From patchwork Wed Apr 9 19:25:07 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sakari Ailus X-Patchwork-Id: 3957261 Return-Path: X-Original-To: patchwork-linux-media@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 286B19F391 for ; Wed, 9 Apr 2014 19:25:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 53C87206B1 for ; Wed, 9 Apr 2014 19:25:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6A47B20166 for ; Wed, 9 Apr 2014 19:25:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934337AbaDITZj (ORCPT ); Wed, 9 Apr 2014 15:25:39 -0400 Received: from mga09.intel.com ([134.134.136.24]:64629 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S964940AbaDITZO (ORCPT ); Wed, 9 Apr 2014 15:25:14 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga102.jf.intel.com with ESMTP; 09 Apr 2014 12:20:30 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.97,828,1389772800"; d="scan'208";a="490195691" Received: from paasikivi.fi.intel.com ([10.237.72.42]) by orsmga001.jf.intel.com with ESMTP; 09 Apr 2014 12:24:56 -0700 Received: from nauris.fi.intel.com (nauris.localdomain [192.168.240.2]) by paasikivi.fi.intel.com (Postfix) with ESMTP id 519DF20E92 for ; Wed, 9 Apr 2014 22:24:55 +0300 (EEST) Received: by nauris.fi.intel.com (Postfix, from userid 1000) id 3E86220133; Wed, 9 Apr 2014 22:25:17 +0300 (EEST) From: Sakari Ailus To: linux-media@vger.kernel.org Subject: [PATCH 15/17] smiapp-pll: Add quirk flag for sensors that effectively use double pix clks Date: Wed, 9 Apr 2014 22:25:07 +0300 Message-Id: <1397071509-2071-16-git-send-email-sakari.ailus@linux.intel.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1397071509-2071-1-git-send-email-sakari.ailus@linux.intel.com> References: <1397071509-2071-1-git-send-email-sakari.ailus@linux.intel.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some sensors have effectively the double pixel (and other clocks) compared to calculations. The frequency of the bus is also affected similarly so take this into account when calculating pll_op_clock frequency. Signed-off-by: Sakari Ailus --- drivers/media/i2c/smiapp-pll.c | 10 ++++++++++ drivers/media/i2c/smiapp-pll.h | 6 ++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/media/i2c/smiapp-pll.c b/drivers/media/i2c/smiapp-pll.c index a83597e..8c48bdc 100644 --- a/drivers/media/i2c/smiapp-pll.c +++ b/drivers/media/i2c/smiapp-pll.c @@ -335,6 +335,10 @@ static int __smiapp_pll_calculate(struct device *dev, pll->pixel_rate_csi = pll->op_pix_clk_freq_hz * lane_op_clock_ratio; pll->pixel_rate_pixel_array = pll->vt_pix_clk_freq_hz; + if (pll->flags & SMIAPP_PLL_FLAG_PIX_CLOCK_DOUBLE) { + pll->pixel_rate_csi *= 2; + pll->pixel_rate_pixel_array *= 2; + } rval = bounds_check(dev, pll->pll_ip_clk_freq_hz, limits->min_pll_ip_freq_hz, @@ -426,6 +430,12 @@ int smiapp_pll_calculate(struct device *dev, */ if (pll->flags & SMIAPP_PLL_FLAG_OP_PIX_DIV_HALF) pll->pll_op_clk_freq_hz /= 2; + /* + * If it'll be multiplied by two in the end divide it now to + * avoid achieving double the desired clock. + */ + if (pll->flags & SMIAPP_PLL_FLAG_PIX_CLOCK_DOUBLE) + pll->pll_op_clk_freq_hz /= 2; /* Figure out limits for pre-pll divider based on extclk */ dev_dbg(dev, "min / max pre_pll_clk_div: %u / %u\n", diff --git a/drivers/media/i2c/smiapp-pll.h b/drivers/media/i2c/smiapp-pll.h index c6ad809..9eaac54 100644 --- a/drivers/media/i2c/smiapp-pll.h +++ b/drivers/media/i2c/smiapp-pll.h @@ -38,6 +38,12 @@ #define SMIAPP_PLL_FLAG_ALLOW_ODD_PRE_PLL_CLK_DIV (1 << 2) /* op pix div value is half of the bits-per-pixel value */ #define SMIAPP_PLL_FLAG_OP_PIX_DIV_HALF (1 << 3) +/* + * The effective vt and op pix clocks are twice as high as the + * calculated value. The limits are still against the regular limit + * values. + */ +#define SMIAPP_PLL_FLAG_PIX_CLOCK_DOUBLE (1 << 4) struct smiapp_pll { /* input values */