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Thu, 18 Feb 2021 03:55:13 +0000 From: Liu Ying To: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: airlied@linux.ie, daniel@ffwll.ch, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, mchehab@kernel.org, a.hajda@samsung.com, narmstrong@baylibre.com, Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se, jernej.skrabec@siol.net, kishon@ti.com, vkoul@kernel.org Subject: [PATCH v4 11/14] dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge binding Date: Thu, 18 Feb 2021 11:41:52 +0800 Message-Id: <1613619715-28785-12-git-send-email-victor.liu@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1613619715-28785-1-git-send-email-victor.liu@nxp.com> References: <1613619715-28785-1-git-send-email-victor.liu@nxp.com> X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR06CA0144.apcprd06.prod.outlook.com (2603:1096:1:1f::22) To VI1PR04MB3983.eurprd04.prod.outlook.com (2603:10a6:803:4c::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR06CA0144.apcprd06.prod.outlook.com (2603:1096:1:1f::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3868.27 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: 0apNDE0wEcnipESd+sOYXmS6Mvmub4G/p6nwroh8v7ffmqJrdxUziJF7m4bt/3ZOUrZ1apGYk94AgOhY6ONSAHIAqvtMDs08UyOI6TjUoUAKp7KdAUZlCA4p/ot8ABL46X7ImbMngae0xZw5K/6StiFDdn4sovoRjGoTwOwGPZ1c9q8432oMjl2SWAGyxKTn1OIf/w/UpjDU/QNWfh1oWQtCz2FA4zML0dMK4eRSlxMdffhyT1KjgeK0qdDpDxmPXXIEhfxveHMC3SvWk57qyudv+bJe3ZKS8Mydmbf2dZ5UjErtj6HmBwZnaNPoOjKiugpgf2xO8FNP5QbiUuk7Cj+CP7lrMYFKzLF6XHu0SuFsr69DSs0QhJ+XED+gGC0YSPYHw2t3g5RA8I89eV2D3QRhI3KZWvhAs9QphmEdvyAQa5DF6MbTUr/fjKD0TcSWMM7fREKPm+0YtLPUvLecGyxTzD5BE+Iuij0u03VFhNO2I0732w5ZpzCYYJGsJw0s+v+52pUMjH1sUoD0K97Gq9w4YK6UM/Qz9/fmBcHvl+EuWJ6KXBGi3irg7J9McMspwUjQcQOzMZSY/Qlpcg7U5iM1quwXH4yMipRdEmjD3+blJP3E561DoaDtWbNmg1ZbNJSrAjTlhCGiW0Er1ZihLhh+qhEctclNQgkPZ1NW4Vjyt8YsJaZPDd6+86Okx4V3OejSm+MepDvAqYWWZLanhX9ssMf7jL9zYH1k/7XtWg7cHEdH7KimaqzXuSci9dMaju4+7lXk2Nci8odQtrYQQiFkTMscaOA/Gb/tV8IUYxfELtbaNkWKNXQqkVkxGdqGIzfIIYIg9iFmYGocT3aylSx6jPr6bEJVyxJDfwBZ94DcmMXy2jQPTSOPY9BM3MQVCHB/yvdx9h5xRWKQYprhDIkDr0VVm0CD5LhgDm2OjX8FOnOx/JXwMwDvdhbUaEKnr7Z5r3b7PzPYnN4iPDY+fNb/bpdogfk6TqZVORgc7CevPEGDf5TY5uRK/rnxRhwwKST1FOszXvyLsboVsdXokKD5XGmiiD4WxI9KJSIrODMDxuzwXMeYGxpO0OCpiHDpiyz3AWL5czalMdxvYcu8lqs/Dhr5m2Wu3XTBfvtBINsTob25i/Z0yb1w7F6SeZXlpnBHYVLkecv7IwxOXrcoxaHoiFbx6OXn/ImsMRX+yEEvQt9AoVM5zay7OeYWZhyJXMPnEiojchCvYjLcLOqyL5gKdbHudaJz+2OxDZVb/lhtSi+J4/Rdwj5QqUILEvFE2FIDszAPGpjabbttpWaaGbP+ooapKjxWSmugGDRzWi2r1SA5d6LTbA+sluFpbqSI X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e7c485de-56f8-4b99-4580-08d8d3c0fea4 X-MS-Exchange-CrossTenant-AuthSource: VI1PR04MB3983.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Feb 2021 03:55:13.5223 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /wBh94GSb+RUTjElsn2lK6W2euUe8rVPyl2nsKKhfVA+KuE6LxwLseNerksb8fW3tlDWs0+IUnmfmtSsSyOSjA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI1PR0402MB3421 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org This patch adds bindings for i.MX8qm/qxp LVDS display bridge(LDB). Reviewed-by: Rob Herring Signed-off-by: Liu Ying --- v3->v4: * Add Rob's R-b tag. v2->v3: * Drop 'fsl,syscon' property. (Rob) * Mention the CSR module controls LDB. v1->v2: * Use graph schema. (Laurent) * Side note i.MX8qxp LDB official name 'pixel mapper'. (Laurent) .../bindings/display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++++++++++++++++++ 1 file changed, 173 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml new file mode 100644 index 00000000..9454300 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml @@ -0,0 +1,173 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8qm/qxp LVDS Display Bridge + +maintainers: + - Liu Ying + +description: | + The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels. + + The i.MX8qm/qxp LDB is controlled by Control and Status Registers(CSR) module. + The CSR module, as a system controller, contains the LDB's configuration + registers. + + For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color + format and can map the input to VESA or JEIDA standards. The two channels + cannot be used simultaneously, that is to say, the user should pick one of + them to use. Two LDB channels from two LDB instances can work together in + LDB split mode to support a dual link LVDS display. The channel indexes + have to be different. Channel0 outputs odd pixels and channel1 outputs + even pixels. + + For i.MX8qm LDB, each channel additionally supports up to 30bpp parallel + input color format. The two channels can be used simultaneously, either + in dual mode or split mode. In dual mode, the two channels output identical + data. In split mode, channel0 outputs odd pixels and channel1 outputs even + pixels. + + A side note is that i.MX8qm/qxp LDB is officially called pixel mapper in + the SoC reference manuals. The pixel mapper uses logic of LDBs embedded in + i.MX6qdl/sx SoCs, i.e., it is essentially based on them. To keep the naming + consistency, this binding calls it LDB. + +properties: + compatible: + enum: + - fsl,imx8qm-ldb + - fsl,imx8qxp-ldb + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + clocks: + items: + - description: pixel clock + - description: bypass clock + + clock-names: + items: + - const: pixel + - const: bypass + + power-domains: + maxItems: 1 + + fsl,companion-ldb: + $ref: /schemas/types.yaml#/definitions/phandle + description: | + A phandle which points to companion LDB which is used in LDB split mode. + +patternProperties: + "^channel@[0-1]$": + type: object + description: Represents a channel of LDB. + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + reg: + description: The channel index. + enum: [ 0, 1 ] + + phys: + description: A phandle to the phy module representing the LVDS PHY. + maxItems: 1 + + phy-names: + const: lvds_phy + + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input port of the channel. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output port of the channel. + + required: + - "#address-cells" + - "#size-cells" + - reg + - phys + - phy-names + + additionalProperties: false + +required: + - compatible + - "#address-cells" + - "#size-cells" + - clocks + - clock-names + - power-domains + - channel@0 + - channel@1 + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8qm-ldb + then: + properties: + fsl,companion-ldb: false + +additionalProperties: false + +examples: + - | + #include + ldb { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,imx8qxp-ldb"; + clocks = <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_MISC2>, + <&clk IMX_SC_R_LVDS_0 IMX_SC_PM_CLK_BYPASS>; + clock-names = "pixel", "bypass"; + power-domains = <&pd IMX_SC_R_LVDS_0>; + + channel@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + phys = <&mipi_lvds_0_phy>; + phy-names = "lvds_phy"; + + port@0 { + reg = <0>; + + mipi_lvds_0_ldb_ch0_mipi_lvds_0_pxl2dpi: endpoint { + remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch0>; + }; + }; + }; + + channel@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + phys = <&mipi_lvds_0_phy>; + phy-names = "lvds_phy"; + + port@0 { + reg = <0>; + + mipi_lvds_0_ldb_ch1_mipi_lvds_0_pxl2dpi: endpoint { + remote-endpoint = <&mipi_lvds_0_pxl2dpi_mipi_lvds_0_ldb_ch1>; + }; + }; + }; + };