Message ID | 1634533488-25334-10-git-send-email-dillon.minfei@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for DMA2D of STMicroelectronics STM32 Soc series | expand |
Hi Dillon, On 18/10/2021 07:04, dillon.minfei@gmail.com wrote: > From: Dillon Min <dillon.minfei@gmail.com> > > stm32's clk driver register two ltdc gate clk to clk core by > clk_hw_register_gate() and clk_hw_register_composite() > > first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. > second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver > > both of them point to the same offset of stm32's RCC register. after > kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' > is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. > > stm32f469/746/769 have the same issue, fix it. > > Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") > Acked-by: Stephen Boyd <sboyd@kernel.org> Just to double check (I asked as well when v1 was posted, but that's a long time ago): I can ignore this patch, right? If so, then make sure you follow up on this in the clk subsystem since it is not yet merged in mainline. If you DO want me to pick it up, then I see that the clk maintainer has already Acked it, so I take it as well. Regards, Hans > Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ > Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ > Signed-off-by: Dillon Min <dillon.minfei@gmail.com> > --- > v5: no change. > > drivers/clk/clk-stm32f4.c | 4 ---- > 1 file changed, 4 deletions(-) > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > index af46176ad053..473dfe632cc5 100644 > --- a/drivers/clk/clk-stm32f4.c > +++ b/drivers/clk/clk-stm32f4.c > @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > }; > > static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, > }; > >
Hi Hans On Mon, 18 Oct 2021 at 17:37, Hans Verkuil <hverkuil-cisco@xs4all.nl> wrote: > > Hi Dillon, > > On 18/10/2021 07:04, dillon.minfei@gmail.com wrote: > > From: Dillon Min <dillon.minfei@gmail.com> > > > > stm32's clk driver register two ltdc gate clk to clk core by > > clk_hw_register_gate() and clk_hw_register_composite() > > > > first: 'stm32f429_gates[]', clk name is 'ltdc', which no user to use. > > second: 'stm32f429_aux_clk[]', clk name is 'lcd-tft', used by ltdc driver > > > > both of them point to the same offset of stm32's RCC register. after > > kernel enter console, clk core turn off ltdc's clk as 'stm32f429_gates[]' > > is no one to use. but, actually 'stm32f429_aux_clk[]' is in use. > > > > stm32f469/746/769 have the same issue, fix it. > > > > Fixes: daf2d117cbca ("clk: stm32f4: Add lcd-tft clock") > > Acked-by: Stephen Boyd <sboyd@kernel.org> > > Just to double check (I asked as well when v1 was posted, but that's a long time ago): > I can ignore this patch, right? If so, then make sure you follow up on this in the clk > subsystem since it is not yet merged in mainline. > > If you DO want me to pick it up, then I see that the clk maintainer has already Acked > it, so I take it as well. Appreciate, please help to pick it up. Thanks & Regards Dillon > > Regards, > > Hans > > > Link: https://lore.kernel.org/linux-arm-kernel/1590564453-24499-7-git-send-email-dillon.minfei@gmail.com/ > > Link: https://lore.kernel.org/lkml/CAPTRvHkf0cK_4ZidM17rPo99gWDmxgqFt4CDUjqFFwkOeQeFDg@mail.gmail.com/ > > Signed-off-by: Dillon Min <dillon.minfei@gmail.com> > > --- > > v5: no change. > > > > drivers/clk/clk-stm32f4.c | 4 ---- > > 1 file changed, 4 deletions(-) > > > > diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c > > index af46176ad053..473dfe632cc5 100644 > > --- a/drivers/clk/clk-stm32f4.c > > +++ b/drivers/clk/clk-stm32f4.c > > @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { > > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > > }; > > > > static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > > @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { > > { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > > }; > > > > static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > > @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { > > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > > }; > > > > static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > > @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { > > { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, > > - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, > > { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, > > }; > > > > >
diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c index af46176ad053..473dfe632cc5 100644 --- a/drivers/clk/clk-stm32f4.c +++ b/drivers/clk/clk-stm32f4.c @@ -129,7 +129,6 @@ static const struct stm32f4_gate_data stm32f429_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { @@ -211,7 +210,6 @@ static const struct stm32f4_gate_data stm32f469_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 20, "spi5", "apb2_div" }, { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { @@ -286,7 +284,6 @@ static const struct stm32f4_gate_data stm32f746_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, }; static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { @@ -364,7 +361,6 @@ static const struct stm32f4_gate_data stm32f769_gates[] __initconst = { { STM32F4_RCC_APB2ENR, 21, "spi6", "apb2_div" }, { STM32F4_RCC_APB2ENR, 22, "sai1", "apb2_div" }, { STM32F4_RCC_APB2ENR, 23, "sai2", "apb2_div" }, - { STM32F4_RCC_APB2ENR, 26, "ltdc", "apb2_div" }, { STM32F4_RCC_APB2ENR, 30, "mdio", "apb2_div" }, };