From patchwork Mon Aug 16 12:30:11 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kusanagi Kouichi X-Patchwork-Id: 119690 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.4/8.14.3) with ESMTP id o7GCkZcC031600 for ; Mon, 16 Aug 2010 12:46:35 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753072Ab0HPMqH (ORCPT ); Mon, 16 Aug 2010 08:46:07 -0400 Received: from msa106.auone-net.jp ([61.117.18.166]:33029 "EHLO msa106.auone-net.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751761Ab0HPMqH (ORCPT ); Mon, 16 Aug 2010 08:46:07 -0400 X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Mon, 16 Aug 2010 12:46:35 +0000 (UTC) X-Greylist: delayed 951 seconds by postgrey-1.27 at vger.kernel.org; Mon, 16 Aug 2010 08:46:06 EDT Received: from ppp.dion.ne.jp (ZJ081080.ppp.dion.ne.jp [222.4.81.80]) by msa106.auone-net.jp (au one net msa) with ESMTP id 9C5FC62C03A; Mon, 16 Aug 2010 21:30:12 +0900 (JST) Date: Mon, 16 Aug 2010 21:30:11 +0900 From: Kusanagi Kouichi To: Mauro Carvalho Chehab Cc: Andy Walls , Steven Toth , Douglas Schilling Landgraf , "David T. L. Wong" , linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] cx23885: Use enum for board type definitions. MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) Message-Id: <20100816123012.9C5FC62C03A@msa106.auone-net.jp> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h index ed94b17..55dc282 100644 --- a/drivers/media/video/cx23885/cx23885.h +++ b/drivers/media/video/cx23885/cx23885.h @@ -54,36 +54,38 @@ #define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ -#define CX23885_BOARD_NOAUTO UNSET -#define CX23885_BOARD_UNKNOWN 0 -#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 -#define CX23885_BOARD_HAUPPAUGE_HVR1800 2 -#define CX23885_BOARD_HAUPPAUGE_HVR1250 3 -#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 -#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 -#define CX23885_BOARD_HAUPPAUGE_HVR1500 6 -#define CX23885_BOARD_HAUPPAUGE_HVR1200 7 -#define CX23885_BOARD_HAUPPAUGE_HVR1700 8 -#define CX23885_BOARD_HAUPPAUGE_HVR1400 9 -#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 -#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 -#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 -#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 -#define CX23885_BOARD_TBS_6920 14 -#define CX23885_BOARD_TEVII_S470 15 -#define CX23885_BOARD_DVBWORLD_2005 16 -#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 -#define CX23885_BOARD_HAUPPAUGE_HVR1270 18 -#define CX23885_BOARD_HAUPPAUGE_HVR1275 19 -#define CX23885_BOARD_HAUPPAUGE_HVR1255 20 -#define CX23885_BOARD_HAUPPAUGE_HVR1210 21 -#define CX23885_BOARD_MYGICA_X8506 22 -#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 -#define CX23885_BOARD_HAUPPAUGE_HVR1850 24 -#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 -#define CX23885_BOARD_HAUPPAUGE_HVR1290 26 -#define CX23885_BOARD_MYGICA_X8558PRO 27 -#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 +enum { + CX23885_BOARD_NOAUTO = UNSET, + CX23885_BOARD_UNKNOWN = 0, + CX23885_BOARD_HAUPPAUGE_HVR1800lp, + CX23885_BOARD_HAUPPAUGE_HVR1800, + CX23885_BOARD_HAUPPAUGE_HVR1250, + CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP, + CX23885_BOARD_HAUPPAUGE_HVR1500Q, + CX23885_BOARD_HAUPPAUGE_HVR1500, + CX23885_BOARD_HAUPPAUGE_HVR1200, + CX23885_BOARD_HAUPPAUGE_HVR1700, + CX23885_BOARD_HAUPPAUGE_HVR1400, + CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP, + CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP, + CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H, + CX23885_BOARD_COMPRO_VIDEOMATE_E650F, + CX23885_BOARD_TBS_6920, + CX23885_BOARD_TEVII_S470, + CX23885_BOARD_DVBWORLD_2005, + CX23885_BOARD_NETUP_DUAL_DVBS2_CI, + CX23885_BOARD_HAUPPAUGE_HVR1270, + CX23885_BOARD_HAUPPAUGE_HVR1275, + CX23885_BOARD_HAUPPAUGE_HVR1255, + CX23885_BOARD_HAUPPAUGE_HVR1210, + CX23885_BOARD_MYGICA_X8506, + CX23885_BOARD_MAGICPRO_PROHDTVE2, + CX23885_BOARD_HAUPPAUGE_HVR1850, + CX23885_BOARD_COMPRO_VIDEOMATE_E800, + CX23885_BOARD_HAUPPAUGE_HVR1290, + CX23885_BOARD_MYGICA_X8558PRO, + CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 +}; #define GPIO_0 0x00000001 #define GPIO_1 0x00000002