From patchwork Fri Mar 9 10:14:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 10270343 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 910466016D for ; Fri, 9 Mar 2018 10:16:56 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 778BA29CE8 for ; Fri, 9 Mar 2018 10:16:56 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6BCE129D4D; Fri, 9 Mar 2018 10:16:56 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8E74C29CE8 for ; Fri, 9 Mar 2018 10:16:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751068AbeCIKQx (ORCPT ); Fri, 9 Mar 2018 05:16:53 -0500 Received: from mail.bootlin.com ([62.4.15.54]:50004 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750939AbeCIKPz (ORCPT ); Fri, 9 Mar 2018 05:15:55 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 76C2720712; Fri, 9 Mar 2018 11:15:52 +0100 (CET) Received: from localhost.localdomain (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.bootlin.com (Postfix) with ESMTPSA id EC17020644; Fri, 9 Mar 2018 11:15:51 +0100 (CET) From: Paul Kocialkowski To: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Cc: Icenowy Zheng , Florent Revest , Alexandre Courbot , Hans Verkuil , Laurent Pinchart , Sakari Ailus , Maxime Ripard , Thomas van Kleef , "Signed-off-by : Bob Ham" , Thomas Petazzoni , Chen-Yu Tsai Subject: [PATCH 9/9] ARM: dts: sun7i: Add video engine support for the A20 Date: Fri, 9 Mar 2018 11:14:45 +0100 Message-Id: <20180309101445.16190-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180309100933.15922-3-paul.kocialkowski@bootlin.com> References: <20180309100933.15922-3-paul.kocialkowski@bootlin.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thomas van Kleef The A20 has a video engine similare to the one in the A13. Add the device node in the A20. Signed-off-by: Thomas van Kleef Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/sun7i-a20.dtsi | 47 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index bd0cd3204273..b0d21208af87 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -53,6 +53,35 @@ / { interrupt-parent = <&gic>; + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + /* + * MUST TO BE IN THE LOWER 256MB of RAM for the VE! + * Src: http://linux-sunxi.org/Sunxi-cedrus "A + * limitation of the Allwinner's VPU is the need for + * buffers in the lower 256M of RAM. In order to + * allocate large sets of data in this area, + * "sunxi-cedrus" reserves a DMA pool that is then + * used by videobuf's dma-contig backend() to allocate + * input and output buffers easily and integrate that + * with the v4l QBUF/DQBUF APIs." + * + * The lower limit is 0x41000000 but the kernel has to + * be moved somewhere else in order to use this + * region. + */ + + ve_reserved: cma { + compatible = "shared-dma-pool"; + reg = <0x41000000 0x9000000>; + no-map; + linux,cma-default; + }; + }; + aliases { ethernet0 = &gmac; }; @@ -451,6 +480,24 @@ }; }; + ve: video-engine@01c0e000 { + compatible = "allwinner,sun4i-a10-video-engine"; + memory-region = <&ve_reserved>; + + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + + assigned-clocks = <&ccu CLK_VE>; + assigned-clock-rates = <320000000>; + + resets = <&ccu RST_VE>; + + interrupts = ; + + reg = <0x01c0e000 0x1000>; + }; + mmc0: mmc@1c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>;