| Message ID | 20180906090215.15719-2-p.zabel@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | i.MX PXP scaler/CSC driver | expand |
Hi Philipp, On Thu, Sep 06, 2018 at 11:02:12AM +0200, Philipp Zabel wrote: > Add DT binding documentation for the Pixel Pipeline (PXP) found on > various NXP i.MX SoCs. > > Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > No changes since v2. > --- > .../devicetree/bindings/media/fsl-pxp.txt | 26 +++++++++++++++++++ > 1 file changed, 26 insertions(+) > create mode 100644 Documentation/devicetree/bindings/media/fsl-pxp.txt > > diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt > new file mode 100644 > index 000000000000..2477e7f87381 > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/fsl-pxp.txt > @@ -0,0 +1,26 @@ > +Freescale Pixel Pipeline > +======================== > + > +The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine > +that supports scaling, colorspace conversion, alpha blending, rotation, and > +pixel conversion via lookup table. Different versions are present on various > +i.MX SoCs from i.MX23 to i.MX7. > + > +Required properties: > +- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, > + imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d. Is imx6q also compatible ? Best regards Philippe
Hi Philippe, On Thu, 2018-09-06 at 12:36 +0200, Philippe De Muyter wrote: [...] > > --- /dev/null > +++ b/Documentation/devicetree/bindings/media/fsl-pxp.txt > > @@ -0,0 +1,26 @@ > > +Freescale Pixel Pipeline > > +======================== > > + > > +The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine > > +that supports scaling, colorspace conversion, alpha blending, rotation, and > > +pixel conversion via lookup table. Different versions are present on various > > +i.MX SoCs from i.MX23 to i.MX7. > > + > > +Required properties: > > +- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, > > + imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d. > > Is imx6q also compatible ? There is no pixel pipeline on i.MX6Q. It has the IPU image converter that can be used for scaling and colorspace conversion instead [1]. [1] https://patchwork.linuxtv.org/patch/51045/ regards Philipp
diff --git a/Documentation/devicetree/bindings/media/fsl-pxp.txt b/Documentation/devicetree/bindings/media/fsl-pxp.txt new file mode 100644 index 000000000000..2477e7f87381 --- /dev/null +++ b/Documentation/devicetree/bindings/media/fsl-pxp.txt @@ -0,0 +1,26 @@ +Freescale Pixel Pipeline +======================== + +The Pixel Pipeline (PXP) is a memory-to-memory graphics processing engine +that supports scaling, colorspace conversion, alpha blending, rotation, and +pixel conversion via lookup table. Different versions are present on various +i.MX SoCs from i.MX23 to i.MX7. + +Required properties: +- compatible: should be "fsl,<soc>-pxp", where SoC can be one of imx23, imx28, + imx6dl, imx6sl, imx6ul, imx6sx, imx6ull, or imx7d. +- reg: the register base and size for the device registers +- interrupts: the PXP interrupt, two interrupts for imx6ull and imx7d. +- clock-names: should be "axi" +- clocks: the PXP AXI clock + +Example: + +pxp@21cc000 { + compatible = "fsl,imx6ull-pxp"; + reg = <0x021cc000 0x4000>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "axi"; + clocks = <&clks IMX6UL_CLK_PXP>; +};