From patchwork Sun May 5 14:00:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 10930165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8151E1398 for ; Sun, 5 May 2019 14:01:58 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6F93C285E0 for ; Sun, 5 May 2019 14:01:58 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63B24285E5; Sun, 5 May 2019 14:01:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EAB4F285E0 for ; Sun, 5 May 2019 14:01:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727951AbfEEOBD (ORCPT ); Sun, 5 May 2019 10:01:03 -0400 Received: from shell.v3.sk ([90.176.6.54]:55710 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727608AbfEEOBD (ORCPT ); Sun, 5 May 2019 10:01:03 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 1E532103D25; Sun, 5 May 2019 16:00:59 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id dqIgvJsipZHb; Sun, 5 May 2019 16:00:46 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id E81DB103D27; Sun, 5 May 2019 16:00:41 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id Agye__H3dehs; Sun, 5 May 2019 16:00:37 +0200 (CEST) Received: from nedofet.lan (ip-89-102-31-34.net.upcbroadband.cz [89.102.31.34]) by zimbra.v3.sk (Postfix) with ESMTPSA id E78C5103D2A; Sun, 5 May 2019 16:00:36 +0200 (CEST) From: Lubomir Rintel To: Mauro Carvalho Chehab , Jonathan Corbet , linux-media@vger.kernel.org Cc: Rob Herring , Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, James Cameron , Pavel Machek , Libin Yang , Albert Wang , jacopo mondi , Sakari Ailus , Lubomir Rintel Subject: [PATCH v5 04/10] Revert "[media] marvell-ccic: reset ccic phy when stop streaming for stability" Date: Sun, 5 May 2019 16:00:25 +0200 Message-Id: <20190505140031.9636-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190505140031.9636-1-lkundrak@v3.sk> References: <20190505140031.9636-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This accesses the clock registers directly and thus is going to stay in the way of making the driver devicetree friendly. No boards seems to actually use this. If it's somehow actually needed it needs to be done differently. This reverts commit 7c269f454e7a51b151d94f99344120efa1cd0acb. --- .../media/platform/marvell-ccic/mcam-core.c | 6 ----- .../media/platform/marvell-ccic/mcam-core.h | 2 -- .../media/platform/marvell-ccic/mmp-driver.c | 25 ------------------- 3 files changed, 33 deletions(-) diff --git a/drivers/media/platform/marvell-ccic/mcam-core.c b/drivers/media/platform/marvell-ccic/mcam-core.c index d24e5b7a3bc52..1b879035948c5 100644 --- a/drivers/media/platform/marvell-ccic/mcam-core.c +++ b/drivers/media/platform/marvell-ccic/mcam-core.c @@ -1154,12 +1154,6 @@ static void mcam_vb_stop_streaming(struct vb2_queue *vq) if (cam->state != S_STREAMING) return; mcam_ctlr_stop_dma(cam); - /* - * Reset the CCIC PHY after stopping streaming, - * otherwise, the CCIC may be unstable. - */ - if (cam->ctlr_reset) - cam->ctlr_reset(cam); /* * VB2 reclaims the buffers, so we need to forget * about them. diff --git a/drivers/media/platform/marvell-ccic/mcam-core.h b/drivers/media/platform/marvell-ccic/mcam-core.h index ad8955f9f0a17..a3a097a45e78b 100644 --- a/drivers/media/platform/marvell-ccic/mcam-core.h +++ b/drivers/media/platform/marvell-ccic/mcam-core.h @@ -116,7 +116,6 @@ struct mcam_camera { int mclk_src; /* which clock source the mclk derives from */ int mclk_div; /* Clock Divider Value for MCLK */ - int ccic_id; enum v4l2_mbus_type bus_type; /* MIPI support */ /* The dphy config value, allocated in board file @@ -137,7 +136,6 @@ struct mcam_camera { int (*plat_power_up) (struct mcam_camera *cam); void (*plat_power_down) (struct mcam_camera *cam); void (*calc_dphy) (struct mcam_camera *cam); - void (*ctlr_reset) (struct mcam_camera *cam); /* * Everything below here is private to the mcam core and diff --git a/drivers/media/platform/marvell-ccic/mmp-driver.c b/drivers/media/platform/marvell-ccic/mmp-driver.c index af76eb6377735..8d982c4aae0d8 100644 --- a/drivers/media/platform/marvell-ccic/mmp-driver.c +++ b/drivers/media/platform/marvell-ccic/mmp-driver.c @@ -105,7 +105,6 @@ static struct mmp_camera *mmpcam_find_device(struct platform_device *pdev) #define CPU_SUBSYS_PMU_BASE 0xd4282800 #define REG_CCIC_DCGCR 0x28 /* CCIC dyn clock gate ctrl reg */ #define REG_CCIC_CRCR 0x50 /* CCIC clk reset ctrl reg */ -#define REG_CCIC2_CRCR 0xf4 /* CCIC2 clk reset ctrl reg */ static void mcam_clk_enable(struct mcam_camera *mcam) { @@ -183,28 +182,6 @@ static void mmpcam_power_down(struct mcam_camera *mcam) mcam_clk_disable(mcam); } -static void mcam_ctlr_reset(struct mcam_camera *mcam) -{ - unsigned long val; - struct mmp_camera *cam = mcam_to_cam(mcam); - - if (mcam->ccic_id) { - /* - * Using CCIC2 - */ - val = ioread32(cam->power_regs + REG_CCIC2_CRCR); - iowrite32(val & ~0x2, cam->power_regs + REG_CCIC2_CRCR); - iowrite32(val | 0x2, cam->power_regs + REG_CCIC2_CRCR); - } else { - /* - * Using CCIC1 - */ - val = ioread32(cam->power_regs + REG_CCIC_CRCR); - iowrite32(val & ~0x2, cam->power_regs + REG_CCIC_CRCR); - iowrite32(val | 0x2, cam->power_regs + REG_CCIC_CRCR); - } -} - /* * calc the dphy register values * There are three dphy registers being used. @@ -352,11 +329,9 @@ static int mmpcam_probe(struct platform_device *pdev) mcam = &cam->mcam; mcam->plat_power_up = mmpcam_power_up; mcam->plat_power_down = mmpcam_power_down; - mcam->ctlr_reset = mcam_ctlr_reset; mcam->calc_dphy = mmpcam_calc_dphy; mcam->dev = &pdev->dev; mcam->use_smbus = 0; - mcam->ccic_id = pdev->id; mcam->mclk_min = pdata->mclk_min; mcam->mclk_src = pdata->mclk_src; mcam->mclk_div = pdata->mclk_div;