From patchwork Fri Oct 4 17:24:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 11175125 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 705CB139A for ; Fri, 4 Oct 2019 17:22:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4EDED222C7 for ; Fri, 4 Oct 2019 17:22:18 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="SIBlkw9W" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388148AbfJDRWO (ORCPT ); Fri, 4 Oct 2019 13:22:14 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:38052 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730074AbfJDRWO (ORCPT ); Fri, 4 Oct 2019 13:22:14 -0400 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id x94HM944095376; Fri, 4 Oct 2019 12:22:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1570209729; bh=JFAvN3381TFnDGTuHwdacGjc/6INTHFjf+2FehpuR3c=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SIBlkw9WMhKYdAXTuYQrkAKFRojKinArE9gAzAB+OLW7SHet/eGpeOc9VOP6lOZoE ECvugLp6Ck9068OSu/1bJM21r2wC0sTpXHUkn1LBNNl+mBXUHJJaFlQOJtqkIEkBxk y0aMayIoQgBocutfcnv6VYyMKEfzJ/7GQFFTazLs= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id x94HM9kJ006953 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 4 Oct 2019 12:22:09 -0500 Received: from DFLE100.ent.ti.com (10.64.6.21) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5; Fri, 4 Oct 2019 12:22:09 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE100.ent.ti.com (10.64.6.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1713.5 via Frontend Transport; Fri, 4 Oct 2019 12:22:08 -0500 Received: from uda0869644b.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id x94HM7Vc041112; Fri, 4 Oct 2019 12:22:09 -0500 From: Benoit Parrot To: Hans Verkuil , Sakari Ailus , Jacopo Mondi CC: , , , Benoit Parrot Subject: [Patch v3 2/3] media: ov5640: Fix 1920x1080 mode to remove extra enable/disable Date: Fri, 4 Oct 2019 12:24:17 -0500 Message-ID: <20191004172418.2339-3-bparrot@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191004172418.2339-1-bparrot@ti.com> References: <20191004172418.2339-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org In the 1920x1080 register array an extra pair of reset ctrl disable re-enable was causing unwanted init delays. Signed-off-by: Benoit Parrot Reviewed-by: Jacopo Mondi --- drivers/media/i2c/ov5640.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c index a3946ca6a13d..5cebad151546 100644 --- a/drivers/media/i2c/ov5640.c +++ b/drivers/media/i2c/ov5640.c @@ -490,7 +490,6 @@ static const struct reg_value ov5640_setting_720P_1280_720[] = { }; static const struct reg_value ov5640_setting_1080P_1920_1080[] = { - {0x3008, 0x42, 0, 0}, {0x3c07, 0x08, 0, 0}, {0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0}, {0x3814, 0x11, 0, 0}, @@ -518,7 +517,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = { {0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0}, {0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0}, {0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0}, - {0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0}, + {0x4005, 0x1a, 0, 0}, }; static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {