Message ID | 20220519075117.1003520-4-tommaso.merciai@amarulasolutions.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: rockchip: px30: fix ov5695 camera probe | expand |
Hi On Thu, May 19, 2022 at 9:51 AM Tommaso Merciai <tommaso.merciai@amarulasolutions.com> wrote: > > Add right mux for mipi-pdn. Mux this pad as gpio2 14 > > Signed-off-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> > Tested-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com> > --- > arch/arm64/boot/dts/rockchip/px30-evb.dts | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts > index 53930e28eadf..0d05a1b098bc 100644 > --- a/arch/arm64/boot/dts/rockchip/px30-evb.dts > +++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts > @@ -450,8 +450,8 @@ ov5695: ov5695@36 { > dvdd-supply = <&vcc1v5_dvp>; > dovdd-supply = <&vcc1v8_dvp>; > pinctrl-names = "default"; > - pinctrl-0 = <&cif_clkout_m0>; > reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; > + pinctrl-0 = <&cif_clkout_m0 &mipi_pdn>; > > port { > ucam_out: endpoint { > @@ -544,6 +544,12 @@ cif_clkout_m0: cif-clkout-m0 { > <2 RK_PB3 1 &pcfg_pull_none_12ma>; > }; > }; > + > + mipi { > + mipi_pdn: mipi-pdn { > + rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > }; > Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Michael > &pmu_io_domains { > -- > 2.25.1 >
diff --git a/arch/arm64/boot/dts/rockchip/px30-evb.dts b/arch/arm64/boot/dts/rockchip/px30-evb.dts index 53930e28eadf..0d05a1b098bc 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb.dts +++ b/arch/arm64/boot/dts/rockchip/px30-evb.dts @@ -450,8 +450,8 @@ ov5695: ov5695@36 { dvdd-supply = <&vcc1v5_dvp>; dovdd-supply = <&vcc1v8_dvp>; pinctrl-names = "default"; - pinctrl-0 = <&cif_clkout_m0>; reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&cif_clkout_m0 &mipi_pdn>; port { ucam_out: endpoint { @@ -544,6 +544,12 @@ cif_clkout_m0: cif-clkout-m0 { <2 RK_PB3 1 &pcfg_pull_none_12ma>; }; }; + + mipi { + mipi_pdn: mipi-pdn { + rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pmu_io_domains {