| Message ID | 20220614191127.3420492-23-paul.elder@ideasonboard.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | media: rkisp1: Cleanups and add support for i.MX8MP | expand |
On 15.06.2022 04:10, Paul Elder wrote: >From: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > >The delay in rkisp1_isp_start() is related to to the CSI-2 receiver and >the camera sensor. Move it where it belongs, to rkisp1_csi_start(). > >Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by Dafna Hirschfeld <dafna@fastmail.com> >--- > drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c | 7 +++++++ > drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c | 6 ------ > 2 files changed, 7 insertions(+), 6 deletions(-) > >diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c >index c1bb8c05543d..fcaffffd371b 100644 >--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c >+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c >@@ -9,6 +9,7 @@ > * Copyright (C) 2017 Rockchip Electronics Co., Ltd. > */ > >+#include <linux/delay.h> > #include <linux/device.h> > #include <linux/phy/phy.h> > #include <linux/phy/phy-mipi-dphy.h> >@@ -120,6 +121,12 @@ int rkisp1_csi_start(struct rkisp1_csi *csi, > > rkisp1_csi_enable(csi); > >+ /* >+ * CIF spec says to wait for sufficient time after enabling >+ * the MIPI interface and before starting the sensor output. >+ */ >+ usleep_range(1000, 1200); >+ > return 0; > } > >diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >index ecb8ca0ad670..3ea0deb6b792 100644 >--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c >@@ -365,12 +365,6 @@ static void rkisp1_isp_start(struct rkisp1_device *rkisp1) > RKISP1_CIF_ISP_CTRL_ISP_ENABLE | > RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE; > rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val); >- >- /* >- * CIF spec says to wait for sufficient time after enabling >- * the MIPI interface and before starting the sensor output. >- */ >- usleep_range(1000, 1200); > } > > /* ---------------------------------------------------------------------------- >-- >2.30.2 >
diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c index c1bb8c05543d..fcaffffd371b 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-csi.c @@ -9,6 +9,7 @@ * Copyright (C) 2017 Rockchip Electronics Co., Ltd. */ +#include <linux/delay.h> #include <linux/device.h> #include <linux/phy/phy.h> #include <linux/phy/phy-mipi-dphy.h> @@ -120,6 +121,12 @@ int rkisp1_csi_start(struct rkisp1_csi *csi, rkisp1_csi_enable(csi); + /* + * CIF spec says to wait for sufficient time after enabling + * the MIPI interface and before starting the sensor output. + */ + usleep_range(1000, 1200); + return 0; } diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c index ecb8ca0ad670..3ea0deb6b792 100644 --- a/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c +++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-isp.c @@ -365,12 +365,6 @@ static void rkisp1_isp_start(struct rkisp1_device *rkisp1) RKISP1_CIF_ISP_CTRL_ISP_ENABLE | RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE; rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val); - - /* - * CIF spec says to wait for sufficient time after enabling - * the MIPI interface and before starting the sensor output. - */ - usleep_range(1000, 1200); } /* ----------------------------------------------------------------------------