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+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/staging/media/cnm,wave.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Chips&Media Wave 5 Series multi-standard codec IP
+
+maintainers:
+ - Nas Chung <nas.chung@chipsnmedia.com>
+ - Robert Beckett <bob.beckett@collabora.com>
+ - Dafna Hirschfeld <dafna.hirschfeld@collabora.com>
+
+description: |-
+ The Chips&Media WAVE codec IP is a multi format video encoder/decoder
+
+properties:
+ compatible:
+ anyOf:
+ - items:
+ - enum:
+ - cnm,cm511-vpu
+ - cnm,cm517-vpu
+ - cnm,cm521-vpu
+ - cnm,cm521c-vpu
+ - cnm,cm521c-dual-vpu
+ - cnm,cm521e1-vpu
+ - cnm,cm537-vpu
+ reg:
+ maxItems: 1
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ sram:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description: phandle pointing to the SRAM device node
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ vpu: video-codec@12345678 {
+ compatible = "cnm,cm521-vpu";
+ reg = <0x12345678 0x1000>;
+ interrupts = <42>;
+ clocks = <&clks 42>;
+ clock-names = "vcodec";
+ sram = <&sram>;
+ };
+