From patchwork Wed Feb 8 05:36:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 13132395 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A160FC636CC for ; Wed, 8 Feb 2023 05:38:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230236AbjBHFiN (ORCPT ); Wed, 8 Feb 2023 00:38:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60840 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230294AbjBHFiG (ORCPT ); Wed, 8 Feb 2023 00:38:06 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A3AC5442CF; Tue, 7 Feb 2023 21:37:56 -0800 (PST) X-UUID: b8e316c6a77211ed945fc101203acc17-20230208 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=/YNErVYUkjC9/9pIn84BESoJK4UIaX0NN4bnv+iDplw=; b=Lvu3Fv0JfcrfkMCZfKkCtqOSZNAhfVMZyCcn/8b+RTius08Uy6eB4uVR1afNduyamBWeFBwBlQnGSgy3p3t0OCWeE81z26c8fx0/yFF1bJUuYElnvXrDOGD8dxkCevF4QAIen78SMLPIZ0N34MI8gXwpKDQNOGzvU8Mmd5BxHok=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.19,REQID:fd8a7a10-82ad-4d25-b2ab-1ebf428b1f09,IP:0,U RL:0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:75 X-CID-INFO: VERSION:1.1.19,REQID:fd8a7a10-82ad-4d25-b2ab-1ebf428b1f09,IP:0,URL :0,TC:0,Content:-20,EDM:0,RT:0,SF:95,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACTI ON:quarantine,TS:75 X-CID-META: VersionHash:885ddb2,CLOUDID:5c1ccdf7-ff42-4fb0-b929-626456a83c14,B ulkID:230208133751JFA2BH46,BulkQuantity:0,Recheck:0,SF:38|29|28|17|19|48,T C:nil,Content:1,EDM:-3,IP:nil,URL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 ,OSI:0,OSA:0,AV:0 X-CID-BVR: 0,NGT X-UUID: b8e316c6a77211ed945fc101203acc17-20230208 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 633470860; Wed, 08 Feb 2023 13:37:48 +0800 Received: from mtkmbs13n1.mediatek.inc (172.21.101.193) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Wed, 8 Feb 2023 13:37:48 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs13n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 8 Feb 2023 13:37:47 +0800 From: Yong Wu To: Joerg Roedel , Matthias Brugger , Mauro Carvalho Chehab , Rob Herring CC: Will Deacon , Robin Murphy , Krzysztof Kozlowski , Hans Verkuil , , , , , , , , "AngeloGioacchino Del Regno" , , , , Yunfei Dong , kyrie wu , , , , Yong Wu Subject: [PATCH v2 04/10] iommu/mediatek: mt8195: Add larb_region_msk Date: Wed, 8 Feb 2023 13:36:37 +0800 Message-ID: <20230208053643.28249-5-yong.wu@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230208053643.28249-1-yong.wu@mediatek.com> References: <20230208053643.28249-1-yong.wu@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Add larb_region_msk for mt8195. We separate the 16GB iova regions by each device's larbid/portid. Refer to include/dt-bindings/memory/mt8195-memory-port.h Signed-off-by: Yong Wu --- drivers/iommu/mtk_iommu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c index fc3d9be120a0..b120382a480b 100644 --- a/drivers/iommu/mtk_iommu.c +++ b/drivers/iommu/mtk_iommu.c @@ -1537,6 +1537,21 @@ static const struct mtk_iommu_plat_data mt8195_data_infra = { .iova_region_nr = ARRAY_SIZE(single_domain), }; +static const unsigned int mt8195_larb_region_msk[][32] = { + [0] = {~0, ~0, ~0, ~0}, /* Region0: all ports for larb0/1/2/3 */ + [1] = {0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, ~0, ~0, ~0, ~0, ~0, /* Region1: larb19/20/21/22/23/24 */ + ~0}, + [2] = {0, 0, 0, 0, ~0, ~0, ~0, ~0, /* Region2: the other larbs. */ + ~0, ~0, ~0, ~0, ~0, ~0, ~0, ~0, + ~0, ~0, 0, 0, 0, 0, 0, 0, + 0, ~0, ~0, ~0, ~0}, + [3] = {0}, + [4] = {[18] = BIT(0) | BIT(1)}, /* Only larb18 port0/1 */ + [5] = {[18] = BIT(2) | BIT(3)}, /* Only larb18 port2/3 */ +}; + static const struct mtk_iommu_plat_data mt8195_data_vdo = { .m4u_plat = M4U_MT8195, .flags = HAS_BCLK | HAS_SUB_COMM_2BITS | OUT_ORDER_WR_EN | @@ -1547,6 +1562,7 @@ static const struct mtk_iommu_plat_data mt8195_data_vdo = { .banks_enable = {true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), + .larb_region_msk = mt8195_larb_region_msk, .larbid_remap = {{2, 0}, {21}, {24}, {7}, {19}, {9, 10, 11}, {13, 17, 15/* 17b */, 25}, {5}}, }; @@ -1561,6 +1577,7 @@ static const struct mtk_iommu_plat_data mt8195_data_vpp = { .banks_enable = {true}, .iova_region = mt8192_multi_dom, .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom), + .larb_region_msk = mt8195_larb_region_msk, .larbid_remap = {{1}, {3}, {22, MTK_INVALID_LARBID, MTK_INVALID_LARBID, MTK_INVALID_LARBID, 23}, {8}, {20}, {12},