diff mbox series

[DONOTMERGE,v3,3/4] arm64: dts: ti: k3-am62a : Add E5010 JPEG Encoder

Message ID 20230816152210.4080779-4-devarsht@ti.com (mailing list archive)
State New, archived
Headers show
Series Add V4L2 M2M Driver for E5010 JPEG Encoder | expand

Commit Message

Devarsh Thakkar Aug. 16, 2023, 3:22 p.m. UTC 
This adds node for E5010 JPEG Encoder node which is a stateful
JPEG Encoder supporting baseline encoding for semiplanar YUV420
and YUV422 video formats to JPEG with resolutions supported
from 64x64 up to 8kx8k resolution.

E5010 JPEG Encoder IP is present main domain, so this
also adds address range for core and mmu regions of E5010 IP
in cbass_main node.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
---
V2: No change
V3: No change

 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 11 +++++++++++
 arch/arm64/boot/dts/ti/k3-am62a.dtsi      |  2 ++
 2 files changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 3198af08fb9f..0dd5c9e280eb 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -816,4 +816,15 @@  ecap2: pwm@23120000 {
 		clock-names = "fck";
 		status = "disabled";
 	};
+
+	e5010: jpeg-encoder@fd20000 {
+		compatible = "ti,e5010-jpeg-enc", "img,e5010-jpeg-enc";
+		reg = <0x00 0xfd20000 0x00 0x100>,
+		      <0x00 0xfd20200 0x00 0x200>;
+		reg-names = "core", "mmu";
+		clocks = <&k3_clks 201 0>;
+		clock-names = "core_clk";
+		power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
+		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am62a.dtsi b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
index 61a210ecd5ff..2dcd41cddf33 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a.dtsi
@@ -61,6 +61,8 @@  cbass_main: bus@f0000 {
 			 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
 			 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
 			 <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
+			 <0x00 0x0fd20000 0x00 0x0fd20000 0x00 0x00000100>, /* JPEGENC0_CORE */
+			 <0x00 0x0fd20200 0x00 0x0fd20200 0x00 0x00000200>, /* JPEGENC0_CORE_MMU */
 			 <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
 			 <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
 			 <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */