From patchwork Fri Sep 1 12:43:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 13372544 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 37A27CA0FE6 for ; Fri, 1 Sep 2023 12:44:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349499AbjIAMoc (ORCPT ); Fri, 1 Sep 2023 08:44:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345967AbjIAMob (ORCPT ); Fri, 1 Sep 2023 08:44:31 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AFCD10D5; Fri, 1 Sep 2023 05:44:27 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:4d01:31d2:de6b:d217]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 8F78166072B2; Fri, 1 Sep 2023 13:44:25 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1693572266; bh=4m9VyfzaPl3rccmt2IyLXBOR1znBsWjZkGkSXM8JtCE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=kMr1r+CaUz75FJUtRbytquRLhTl41IO9CYqHlmZnITOlaj0xK5xXEgzz40aGvhKx1 KMiZiGHuAmIU3hwooY8CVOFfy+/AKKHB/bMjrSq0Pk8wTXuomqI7p3bp5yu45KrOVp QkjZUXPxAVrhnnYKj80/3M8keNbVsW4smpIiGks8m8oAvslcU20cNoCStoUbjPURcu iXwKBxA2t1OxzsTHtsgMdZC4+Ul3jIKJROwq/MkFfpKE47x9SAjGmmmgZRV92k9RBP 6Mjk2CsfG2vigNu0l4cewtXFq8JUhVRtkgQDH08Ti4NBjVa2pivNvDGznOnUo9j9yJ or6k1VDPZwI0A== From: Benjamin Gaignard To: mchehab@kernel.org, tfiga@chromium.org, m.szyprowski@samsung.com, ming.qian@nxp.com, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v6 01/18] media: videobuf2: Rework offset 'cookie' encoding pattern Date: Fri, 1 Sep 2023 14:43:57 +0200 Message-Id: <20230901124414.48497-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230901124414.48497-1-benjamin.gaignard@collabora.com> References: <20230901124414.48497-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Change how offset 'cookie' field value is computed to make possible to use more buffers (up to 0x7fff) With this encoding pattern we know the maximum number that a queue could store so we can check ing at queue init time. It also make easier and faster to find buffer and plane from using the offset field. Signed-off-by: Benjamin Gaignard --- v6: - Change buffer index name to BUFFER_INDEX_MASK - Max size if 0x7fff not 0xffff .../media/common/videobuf2/videobuf2-core.c | 48 +++++++++---------- 1 file changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/media/common/videobuf2/videobuf2-core.c b/drivers/media/common/videobuf2/videobuf2-core.c index cf6727d9c81f..cf3b9f5b69b7 100644 --- a/drivers/media/common/videobuf2/videobuf2-core.c +++ b/drivers/media/common/videobuf2/videobuf2-core.c @@ -31,6 +31,10 @@ #include +#define PLANE_INDEX_SHIFT (PAGE_SHIFT + 3) +#define PLANE_INDEX_MASK 0x7 +#define BUFFER_INDEX_MASK 0x7fff + static int debug; module_param(debug, int, 0644); @@ -358,21 +362,23 @@ static void __setup_offsets(struct vb2_buffer *vb) unsigned int plane; unsigned long off = 0; - if (vb->index) { - struct vb2_buffer *prev = q->bufs[vb->index - 1]; - struct vb2_plane *p = &prev->planes[prev->num_planes - 1]; - - off = PAGE_ALIGN(p->m.offset + p->length); - } + /* + * Offsets cookies value have the following constraints: + * - a buffer could have up to 8 planes. + * - v4l2 mem2mem use bit 30 to distinguish between source and destination buffers. + * - must be page aligned + * That led to this bit mapping: + * |30 |29 15|14 12|11 0| + * |DST_QUEUE_OFF_BASE|buffer index|plane index| 0 | + * where there is 15 bits to store buffer index. + */ + off = vb->index << (PLANE_INDEX_SHIFT); for (plane = 0; plane < vb->num_planes; ++plane) { - vb->planes[plane].m.offset = off; + vb->planes[plane].m.offset = off + (plane << PAGE_SHIFT); dprintk(q, 3, "buffer %d, plane %d offset 0x%08lx\n", vb->index, plane, off); - - off += vb->planes[plane].length; - off = PAGE_ALIGN(off); } } @@ -2209,21 +2215,15 @@ static int __find_plane_by_offset(struct vb2_queue *q, unsigned long off, return -EBUSY; } - /* - * Go over all buffers and their planes, comparing the given offset - * with an offset assigned to each plane. If a match is found, - * return its buffer and plane numbers. - */ - for (buffer = 0; buffer < q->num_buffers; ++buffer) { - vb = q->bufs[buffer]; + /* Get buffer and plane from the offset */ + buffer = (off >> PLANE_INDEX_SHIFT) & BUFFER_INDEX_MASK; + plane = (off >> PAGE_SHIFT) & PLANE_INDEX_MASK; - for (plane = 0; plane < vb->num_planes; ++plane) { - if (vb->planes[plane].m.offset == off) { - *_buffer = buffer; - *_plane = plane; - return 0; - } - } + vb = q->bufs[buffer]; + if (vb->planes[plane].m.offset == off) { + *_buffer = buffer; + *_plane = plane; + return 0; } return -EINVAL;