From patchwork Mon Jan 22 11:51:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jason Z" X-Patchwork-Id: 13525338 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 126733BB32 for ; Mon, 22 Jan 2024 11:51:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.55.52.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705924317; cv=none; b=MdxK8KNWFBKkDchZRjkFj+qxJGMr2m1bYRfFM/1doYUNTTCJLAr6kGz+1Qh86iOKtHUmTIIPb5pRGqpYw2KQKd932e/I1jnNDK8cNagp+lkAXRvcTKEOUyCXogR2GZGKgFj0UYXxzSFI0heyNlGgbtATFpEeR7zw1HjZqLRKmWw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1705924317; c=relaxed/simple; bh=5ZFswT3+C9B8kJy1I2+ODxzoma5FEQkfGBXODFB4WG8=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=gMuop4eGUozbE7kNZRRI2qgbeoecy3lVYIoTX5qwYh82bHerhlAn+oSPI11JERMWXCK6R5NrNYpJPbrCdEslKWT6z55GQvzw0mLlpeoDMAFrQnhCrPcALEvFxsHlj+dCux0ceyokKElsd04wsQFIUMfOXY13hQl1YIJ9boPt/4U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mYN2hAin; arc=none smtp.client-ip=192.55.52.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mYN2hAin" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1705924315; x=1737460315; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=5ZFswT3+C9B8kJy1I2+ODxzoma5FEQkfGBXODFB4WG8=; b=mYN2hAin+UtvKqfBDNuydSTFoCx74QVoXXr4MfjV0vtnCB/Ed/IkC8T5 L5W8PgZHtAHwRn//mqn3KKUwBskAWA3lpkWPKfz2rmJeEFPE+q4NwAyUa uqSImTazFtD5c+UNTtgBufgPrl9UL3SSKc8D8MjkSH3TAcGKiwSC7AibA 1Il+qIl4VDXHBOTTCnEtmKiy41quoymykGFkRaAmKAgJrkriZkD+pNEdh dUd0bn0JXISPjEZgHBVPMHYPn6q1yt2dn6WphxuQiWDn9q3xqFC56jeXx +Q6ZL9REziR2THgBgF+WRnyCRaUx6a75mhL6yhpqu5DUWN5daU7xRjMWR w==; X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="432349166" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="432349166" Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Jan 2024 03:51:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10960"; a="958716719" X-IronPort-AV: E=Sophos;i="6.05,211,1701158400"; d="scan'208";a="958716719" Received: from jasonz-ms-7d25.itwn.intel.com ([10.227.107.10]) by orsmga005.jf.intel.com with ESMTP; 22 Jan 2024 03:51:51 -0800 From: "Chen, Jason Z" To: sakari.ailus@linux.intel.com, bingbu.cao@linux.intel.com, linux-media@vger.kernel.org Cc: andy.yeh@intel.com, qingwu.zhang@intel.com, Jason Chen Subject: [PATCH v2] media: ov08x40: Reduce start streaming time Date: Mon, 22 Jan 2024 19:51:05 +0800 Message-Id: <20240122115105.3482080-1-jason.z.chen@intel.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Jason Chen Because video duration involves calculating the streaming time, and i2c communication incurs too many XTALK register settings every 4 bytes with i2c START and STOP. So we have opted switch to the i2c burst method. This method involves writing the XTALK registers in the order of the register block. The start streaming time can be reduced from around 400ms to 150ms Signed-off-by: Jason Chen --- drivers/media/i2c/ov08x40.c | 1199 ++--------------------------------- 1 file changed, 47 insertions(+), 1152 deletions(-) diff --git a/drivers/media/i2c/ov08x40.c b/drivers/media/i2c/ov08x40.c index ddcb4b6848b..839c87f1a25 100644 --- a/drivers/media/i2c/ov08x40.c +++ b/drivers/media/i2c/ov08x40.c @@ -682,1158 +682,6 @@ static const struct ov08x40_reg mode_3856x2416_regs[] = { {0x3502, 0x10}, {0x3508, 0x0f}, {0x3509, 0x80}, - {0x5a80, 0x75}, - {0x5a81, 0x75}, - {0x5a82, 0x75}, - {0x5a83, 0x75}, - {0x5a84, 0x75}, - {0x5a85, 0x75}, - {0x5a86, 0x75}, - {0x5a87, 0x75}, - {0x5a88, 0x75}, - {0x5a89, 0x75}, - {0x5a8a, 0x75}, - {0x5a8b, 0x75}, - {0x5a8c, 0x75}, - {0x5a8d, 0x75}, - {0x5a8e, 0x75}, - {0x5a8f, 0x75}, - {0x5a90, 0x75}, - {0x5a91, 0x75}, - {0x5a92, 0x75}, - {0x5a93, 0x75}, - {0x5a94, 0x75}, - {0x5a95, 0x75}, - {0x5a96, 0x75}, - {0x5a97, 0x75}, - {0x5a98, 0x75}, - {0x5a99, 0x75}, - {0x5a9a, 0x75}, - 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{0x5e73, 0x75}, - {0x5e74, 0x75}, - {0x5e75, 0x75}, - {0x5e76, 0x75}, - {0x5e77, 0x75}, - {0x5e78, 0x75}, - {0x5e79, 0x75}, - {0x5e7a, 0x75}, - {0x5e7b, 0x75}, - {0x5e7c, 0x75}, - {0x5e7d, 0x75}, - {0x5e7e, 0x75}, - {0x5e7f, 0x75}, - {0x5e80, 0x75}, - {0x5e81, 0x75}, - {0x5e82, 0x75}, - {0x5e83, 0x75}, - {0x5e84, 0x75}, - {0x5e85, 0x75}, - {0x5e86, 0x75}, - {0x5e87, 0x75}, - {0x5e88, 0x75}, - {0x5e89, 0x75}, - {0x5e8a, 0x75}, - {0x5e8b, 0x75}, - {0x5e8c, 0x75}, - {0x5e8d, 0x75}, - {0x5e8e, 0x75}, - {0x5e8f, 0x75}, - {0x5e90, 0x75}, - {0x5e91, 0x75}, - {0x5e92, 0x75}, - {0x5e93, 0x75}, - {0x5e94, 0x75}, - {0x5e95, 0x75}, - {0x5e96, 0x75}, - {0x5e97, 0x75}, - {0x5e98, 0x75}, - {0x5e99, 0x75}, - {0x5e9a, 0x75}, - {0x5e9b, 0x75}, - {0x5e9c, 0x75}, - {0x5e9d, 0x75}, - {0x5e9e, 0x75}, - {0x5e9f, 0x75}, - {0x5ea0, 0x75}, - {0x5ea1, 0x75}, - {0x5ea2, 0x75}, - {0x5ea3, 0x75}, - {0x5ea4, 0x75}, - {0x5ea5, 0x75}, - {0x5ea6, 0x75}, - {0x5ea7, 0x75}, - {0x5ea8, 0x75}, - {0x5ea9, 0x75}, - {0x5eaa, 0x75}, - {0x5eab, 0x75}, - {0x5eac, 0x75}, - {0x5ead, 0x75}, - {0x5eae, 0x75}, - {0x5eaf, 0x75}, - {0x5eb0, 0x75}, - {0x5eb1, 0x75}, - {0x5eb2, 0x75}, - {0x5eb3, 0x75}, - {0x5eb4, 0x75}, - {0x5eb5, 0x75}, - {0x5eb6, 0x75}, - {0x5eb7, 0x75}, - {0x5eb8, 0x75}, - {0x5eb9, 0x75}, - {0x5eba, 0x75}, - {0x5ebb, 0x75}, - {0x5ebc, 0x75}, - {0x5ebd, 0x75}, - {0x5ebe, 0x75}, - {0x5ebf, 0x75}, - {0x5ec0, 0x75}, - {0x5ec1, 0x75}, - {0x5ec2, 0x75}, - {0x5ec3, 0x75}, - {0x5ec4, 0x75}, - {0x5ec5, 0x75}, - {0x5ec6, 0x75}, - {0x5ec7, 0x75}, - {0x5ec8, 0x75}, - {0x5ec9, 0x75}, - {0x5eca, 0x75}, - {0x5ecb, 0x75}, - {0x5ecc, 0x75}, - {0x5ecd, 0x75}, - {0x5ece, 0x75}, - {0x5ecf, 0x75}, - {0x5ed0, 0x75}, - {0x5ed1, 0x75}, - {0x5ed2, 0x75}, - {0x5ed3, 0x75}, - {0x5ed4, 0x75}, - {0x5ed5, 0x75}, - {0x5ed6, 0x75}, - {0x5ed7, 0x75}, - {0x5ed8, 0x75}, - {0x5ed9, 0x75}, - {0x5eda, 0x75}, - {0x5edb, 0x75}, - {0x5edc, 0x75}, - {0x5edd, 0x75}, - {0x5ede, 0x75}, - {0x5edf, 0x75}, - {0x5ee0, 0x75}, - {0x5ee1, 0x75}, - {0x5ee2, 0x75}, - {0x5ee3, 0x75}, - {0x5ee4, 0x75}, - {0x5ee5, 0x75}, - {0x5ee6, 0x75}, - {0x5ee7, 0x75}, - {0x5ee8, 0x75}, - {0x5ee9, 0x75}, - {0x5eea, 0x75}, - {0x5eeb, 0x75}, - {0x5eec, 0x75}, - {0x5eed, 0x75}, - {0x5eee, 0x75}, - {0x5eef, 0x75}, - {0x5ef0, 0x75}, - {0x5ef1, 0x75}, - {0x5ef2, 0x75}, - {0x5ef3, 0x75}, - {0x5ef4, 0x75}, - {0x5ef5, 0x75}, - {0x5ef6, 0x75}, - {0x5ef7, 0x75}, - {0x5ef8, 0x75}, - {0x5ef9, 0x75}, - {0x5efa, 0x75}, - {0x5efb, 0x75}, - {0x5efc, 0x75}, - {0x5efd, 0x75}, - {0x5efe, 0x75}, - {0x5eff, 0x75}, - {0x5f00, 0x75}, - {0x5f01, 0x75}, - {0x5f02, 0x75}, - {0x5f03, 0x75}, - {0x5f04, 0x75}, - {0x5f05, 0x75}, - {0x5f06, 0x75}, - {0x5f07, 0x75}, - {0x5f08, 0x75}, - {0x5f09, 0x75}, - {0x5f0a, 0x75}, - {0x5f0b, 0x75}, - {0x5f0c, 0x75}, - {0x5f0d, 0x75}, - {0x5f0e, 0x75}, - {0x5f0f, 0x75}, - {0x5f10, 0x75}, - {0x5f11, 0x75}, - {0x5f12, 0x75}, - {0x5f13, 0x75}, - {0x5f14, 0x75}, - {0x5f15, 0x75}, - {0x5f16, 0x75}, - {0x5f17, 0x75}, - {0x5f18, 0x75}, - {0x5f19, 0x75}, - {0x5f1a, 0x75}, - {0x5f1b, 0x75}, - {0x5f1c, 0x75}, - {0x5f1d, 0x75}, - {0x5f1e, 0x75}, - {0x5f1f, 0x75}, }; static const struct ov08x40_reg mode_1928x1208_regs[] = { @@ -2493,6 +1341,47 @@ static int ov08x40_read_reg(struct ov08x40 *ov08x, return 0; } +static int ov08x40_burst_write_regs(struct ov08x40 *ov08x, u16 reg, u8 val, size_t num_regs) +{ + struct i2c_client *client = v4l2_get_subdevdata(&ov08x->sd); + struct i2c_msg *msgs; + __be16 reg_addr_be = cpu_to_be16(reg); + size_t i; + int ret; + + msgs = kmalloc_array(num_regs, sizeof(struct i2c_msg), GFP_KERNEL); + if (!msgs) + return -ENOMEM; + + /* Set up the first message for the register address */ + msgs[0].addr = client->addr; + msgs[0].flags = 0; + msgs[0].len = 2; + msgs[0].buf = (u8 *)®_addr_be; + + /* Set up the subsequent messages for the data value */ + for (i = 1; i <= num_regs; ++i) { + msgs[i].addr = client->addr; + msgs[i].flags = 0; + msgs[i].len = 1; + msgs[i].buf = &val; + } + + ret = i2c_transfer(client->adapter, msgs, num_regs); + + kfree(msgs); + + if (ret != num_regs) { + dev_err(&client->dev, "Only %d out of %zu msgs have transferred successfully\n", + ret, num_regs); + return -EIO; + } + + dev_dbg(&client->dev, "I2C burst transfer succeeded\n"); + + return 0; +} + /* Write registers up to 4 at a time */ static int ov08x40_write_reg(struct ov08x40 *ov08x, u16 reg, u32 len, u32 __val) @@ -2936,6 +1825,12 @@ static int ov08x40_start_streaming(struct ov08x40 *ov08x) return ret; } + /* Use i2c burst to write register on full size registers */ + if (ov08x->cur_mode->exposure_shift == 1) { + ov08x40_burst_write_regs(ov08x, 0x5a80, 0x75, 0x5b9f - 0x5a80 + 1); + ov08x40_burst_write_regs(ov08x, 0x5bc0, 0x75, 0x5f1f - 0x5bc0 + 1); + } + /* Apply customized values from user */ ret = __v4l2_ctrl_handler_setup(ov08x->sd.ctrl_handler); if (ret)