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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: u1hjulIpDpw4NIRl8i8KGQCVwwaNNQ73l09bmYqBKgCOMLpF8qYp2wzR/rVsUDg0PmegQuTQm9jhdR5MrxXXxjw0KJiDkRlk43vkN0yQxOMP8B+JbORlmbSrx8aPsjua+mYMZDU/RjdNRhHjaPGEYHpTHUzc9E5/bZ4s6JU9B0E3NUcBv2FnBTMFIPZJEdcxGRj7w+c5HhcTJKGOcxYOsSAEBESwxjdfhVWKpr5OO8frPNxTilrP2lSPF+JY9xOdVMIAhJK//rmyRXYy0XMVGTEUwhWpH3we840Hu8rVMl//6bsgVksgL7K0VZZmr4OjK0SqvSXj5zFNrjneKwMqqXwN8hOtmN6G+TQM1Kx354Mn2bbkuydHE6APsKoeJ0mu7qLMic2K8T1fQm/XGIqxKYEXI1M7MICUz5K6Ezy70LIMmPXPFzj5AVPxWSYjm3VN5DLiJ7hH8FoSBalIGoXfKVvVNiUjTmOz30zwoj/XAWKz8zvOWgElngZH1C7KnmRncwxK7ONWc4Iy81K/AYLSStZ466+DocNEw01J2q4sTynEdq0kGJsaxJD/cMwGp6V/l8roqwtkbtysO8As2cWbl3qymPVk642Wes3iyfF67JVBoHYdDkgLb3nDXmFRuct1kcuVlq8aTJxYRTjm8sRXd+u8NJssjc8v0k5FlqubEJACUjBbhdNoRUB08HN73O7NxlP7AMZuDGM24u2vEpv6eUEu95mTyeDqJ5tcclwqepqVmqTxdyFWVDyABmzt3CiZzkXXZqkm1Qd0cTwPVMzdEfI83didDSLZjyoURrQT4A/MuA5pMcaXIKjciJfhj86MuKQq552BiiAW1Kof3Wp2JWH2AE5lnxgtQOzmBQpkuGYOIszYvS3kfAwsYZwjPklbvqN5P3hqa0NP4+Vv6Df8uY9tcEGgBBLUo4u9MFHBySmQ0Dm0KoLdBFbhKs6UPfT7bvi2K/I6skLaNB8pTqoTVtp6AYuVgD1W65vxwZNQhWJBSJiv2pbQrm5Ed9Bimbcgha6nAJDKuHSrmYTQBkMcx8p8+7JLfQJUZFfni1b4npAZ/xGDBxQF9dHLcryDLD1WCe41mLI6Wzk0uKPE3pZOKD3tMjwSzXMywFYSEqTcatVS0txjgHueZ3eb8/axNs8GA0sKb8ky2mPiBslqKYoITmMLb3hYQlGsyKtmmtEWeVp/GCOeh6ZRjCcbrUgcT7QXhcZpkBBJNcmHS9y4BY+PuJXshi6b2EPslwceKg13fmcjpHVmIST+3AkCKGvRN5p4arvuldtuHPaCyG81kbbSSdXVZ3jGkFKfhlZ3ldxZkMWYnQZmAtyHkb/gort8WUEEioEP5L736yaolTvuOsWh8dPojvrddL/+6mkqO/RSiYPxeh0I+ObcpdkidosFCAYQJCBu2I/F2+mnitk212Ear5M/KLi6jHcNLZwSl4NF+eWeHxb2dESSD5m2r3JVwF4EiPyo28h90PFchR7hgDbJbWp82DaYrel1v79y+Q57qwEU7RO7IMiTV7S0iIl+NWwNJZ7dSt7Yb6gnIuzfusgdOxpiQ/AFA2DNGAx0KF2D62fsDjXiyC0aDwoWCqXjOSr27Oow3hZyw2iikmYODFhFe5Fliqx7p8UdfqCTDd8dSrc= X-OriginatorOrg: chipsnmedia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 28235bb9-bf84-4473-3c4d-08dc23bd2ab5 X-MS-Exchange-CrossTenant-AuthSource: SE1P216MB1303.KORP216.PROD.OUTLOOK.COM X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Feb 2024 07:04:15.3239 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 4d70c8e9-142b-4389-b7f2-fa8a3c68c467 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: LUEVIgr6VTySA7ihW7M0UGIYb5dBCHllGRW7VlRjTGi+p9SzWrt/CwMIzJucJy1G7tDDYB2T4QICgqi5IAkI+c4R/nLV1CSquPJAF/UhIcs= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SE2P216MB1425 There are two device run-time PM callbacks defined in 'struct dev_pm_ops' int (*runtime_suspend)(struct device *dev); int (*runtime_resume)(struct device *dev); Signed-off-by: Jackson Lee Signed-off-by: Nas Chung --- .../platform/chips-media/wave5/wave5-hw.c | 5 +- .../chips-media/wave5/wave5-vpu-dec.c | 9 +++ .../chips-media/wave5/wave5-vpu-enc.c | 9 +++ .../platform/chips-media/wave5/wave5-vpu.c | 68 +++++++++++++++++++ .../platform/chips-media/wave5/wave5-vpuapi.c | 7 ++ .../media/platform/chips-media/wave5/wave5.h | 3 + 6 files changed, 99 insertions(+), 2 deletions(-) diff --git a/drivers/media/platform/chips-media/wave5/wave5-hw.c b/drivers/media/platform/chips-media/wave5/wave5-hw.c index 8ad7f3a28ae1..8aade5a38439 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-hw.c +++ b/drivers/media/platform/chips-media/wave5/wave5-hw.c @@ -503,6 +503,7 @@ int wave5_vpu_build_up_dec_param(struct vpu_instance *inst, /* This register must be reset explicitly */ vpu_write_reg(inst->dev, W5_CMD_EXT_ADDR, 0); vpu_write_reg(inst->dev, W5_CMD_NUM_CQ_DEPTH_M1, (COMMAND_QUEUE_DEPTH - 1)); + vpu_write_reg(inst->dev, W5_CMD_ERR_CONCEAL, 0); ret = send_firmware_command(inst, W5_CREATE_INSTANCE, true, NULL, NULL); if (ret) { @@ -1075,8 +1076,8 @@ int wave5_vpu_re_init(struct device *dev, u8 *fw, size_t size) return setup_wave5_properties(dev); } -static int wave5_vpu_sleep_wake(struct device *dev, bool i_sleep_wake, const uint16_t *code, - size_t size) +int wave5_vpu_sleep_wake(struct device *dev, bool i_sleep_wake, const uint16_t *code, + size_t size) { u32 reg_val; struct vpu_buf *common_vb; diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c index ef227af72348..328a7a8f26c5 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-dec.c @@ -5,6 +5,7 @@ * Copyright (C) 2021-2023 CHIPS&MEDIA INC */ +#include #include "wave5-helper.h" #define VPU_DEC_DEV_NAME "C&M Wave5 VPU decoder" @@ -1387,9 +1388,17 @@ static int wave5_vpu_dec_start_streaming(struct vb2_queue *q, unsigned int count if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE && inst->state == VPU_INST_STATE_NONE) { struct dec_open_param open_param; + int err = 0; memset(&open_param, 0, sizeof(struct dec_open_param)); + err = pm_runtime_resume_and_get(inst->dev->dev); + if (err) { + dev_err(inst->dev->dev, "decoder runtime resume failed %d\n", err); + ret = -EINVAL; + goto return_buffers; + } + ret = wave5_vpu_dec_allocate_ring_buffer(inst); if (ret) goto return_buffers; diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c b/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c index 761775216cd4..ff73d69de41c 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu-enc.c @@ -5,6 +5,7 @@ * Copyright (C) 2021-2023 CHIPS&MEDIA INC */ +#include #include "wave5-helper.h" #define VPU_ENC_DEV_NAME "C&M Wave5 VPU encoder" @@ -1387,9 +1388,17 @@ static int wave5_vpu_enc_start_streaming(struct vb2_queue *q, unsigned int count if (inst->state == VPU_INST_STATE_NONE && q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) { struct enc_open_param open_param; + int err = 0; memset(&open_param, 0, sizeof(struct enc_open_param)); + err = pm_runtime_resume_and_get(inst->dev->dev); + if (err) { + dev_err(inst->dev->dev, "encoder runtime resume failed %d\n", err); + ret = -EINVAL; + goto return_buffers; + } + wave5_set_enc_openparam(&open_param, inst); ret = wave5_vpu_enc_open(inst, &open_param); diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu.c b/drivers/media/platform/chips-media/wave5/wave5-vpu.c index 0d90b5820bef..f81409740a56 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpu.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpu.c @@ -10,6 +10,7 @@ #include #include #include +#include #include "wave5-vpu.h" #include "wave5-regdefine.h" #include "wave5-vpuconfig.h" @@ -117,6 +118,65 @@ static int wave5_vpu_load_firmware(struct device *dev, const char *fw_name, return 0; } +static __maybe_unused int wave5_pm_suspend(struct device *dev) +{ + struct vpu_device *vpu = dev_get_drvdata(dev); + + if (pm_runtime_suspended(dev)) + return 0; + + wave5_vpu_sleep_wake(dev, true, NULL, 0); + clk_bulk_disable_unprepare(vpu->num_clks, vpu->clks); + + return 0; +} + +static __maybe_unused int wave5_pm_resume(struct device *dev) +{ + struct vpu_device *vpu = dev_get_drvdata(dev); + int ret = 0; + + wave5_vpu_sleep_wake(dev, false, NULL, 0); + ret = clk_bulk_prepare_enable(vpu->num_clks, vpu->clks); + if (ret) { + dev_err(dev, "Enabling clocks, fail: %d\n", ret); + return ret; + } + + return ret; +} + +static __maybe_unused int wave5_suspend(struct device *dev) +{ + struct vpu_device *vpu = dev_get_drvdata(dev); + struct vpu_instance *inst; + + list_for_each_entry(inst, &vpu->instances, list) + v4l2_m2m_suspend(inst->v4l2_m2m_dev); + + return pm_runtime_force_suspend(dev); +} + +static __maybe_unused int wave5_resume(struct device *dev) +{ + struct vpu_device *vpu = dev_get_drvdata(dev); + struct vpu_instance *inst; + int ret = 0; + + ret = pm_runtime_force_resume(dev); + if (ret < 0) + return ret; + + list_for_each_entry(inst, &vpu->instances, list) + v4l2_m2m_resume(inst->v4l2_m2m_dev); + + return ret; +} + +static const struct dev_pm_ops wave5_pm_ops = { + SET_RUNTIME_PM_OPS(wave5_pm_suspend, wave5_pm_resume, NULL) +}; + static int wave5_vpu_probe(struct platform_device *pdev) { int ret; @@ -232,6 +292,10 @@ static int wave5_vpu_probe(struct platform_device *pdev) (match_data->flags & WAVE5_IS_DEC) ? "'DECODE'" : ""); dev_info(&pdev->dev, "Product Code: 0x%x\n", dev->product_code); dev_info(&pdev->dev, "Firmware Revision: %u\n", fw_revision); + + pm_runtime_enable(&pdev->dev); + wave5_vpu_sleep_wake(&pdev->dev, true, NULL, 0); + return 0; err_enc_unreg: @@ -254,6 +318,9 @@ static int wave5_vpu_remove(struct platform_device *pdev) { struct vpu_device *dev = dev_get_drvdata(&pdev->dev); + pm_runtime_put_sync(&pdev->dev); + pm_runtime_disable(&pdev->dev); + mutex_destroy(&dev->dev_lock); mutex_destroy(&dev->hw_lock); clk_bulk_disable_unprepare(dev->num_clks, dev->clks); @@ -281,6 +348,7 @@ static struct platform_driver wave5_vpu_driver = { .driver = { .name = VPU_PLATFORM_DEVICE_NAME, .of_match_table = of_match_ptr(wave5_dt_ids), + .pm = &wave5_pm_ops, }, .probe = wave5_vpu_probe, .remove = wave5_vpu_remove, diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.c b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.c index 1a3efb638dde..f1f8e4fc8474 100644 --- a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.c +++ b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.c @@ -6,6 +6,7 @@ */ #include +#include #include "wave5-vpuapi.h" #include "wave5-regdefine.h" #include "wave5.h" @@ -232,6 +233,9 @@ int wave5_vpu_dec_close(struct vpu_instance *inst, u32 *fail_res) wave5_vdi_free_dma_memory(vpu_dev, &p_dec_info->vb_task); + if (!pm_runtime_suspended(inst->dev->dev)) + pm_runtime_put_sync(inst->dev->dev); + unlock_and_return: mutex_unlock(&vpu_dev->hw_lock); @@ -734,6 +738,9 @@ int wave5_vpu_enc_close(struct vpu_instance *inst, u32 *fail_res) wave5_vdi_free_dma_memory(vpu_dev, &p_enc_info->vb_task); + if (!pm_runtime_suspended(inst->dev->dev)) + pm_runtime_put_sync(inst->dev->dev); + mutex_unlock(&vpu_dev->hw_lock); return 0; diff --git a/drivers/media/platform/chips-media/wave5/wave5.h b/drivers/media/platform/chips-media/wave5/wave5.h index 063028eccd3b..6125eff938a8 100644 --- a/drivers/media/platform/chips-media/wave5/wave5.h +++ b/drivers/media/platform/chips-media/wave5/wave5.h @@ -56,6 +56,9 @@ int wave5_vpu_get_version(struct vpu_device *vpu_dev, u32 *revision); int wave5_vpu_init(struct device *dev, u8 *fw, size_t size); +int wave5_vpu_sleep_wake(struct device *dev, bool i_sleep_wake, const uint16_t *code, + size_t size); + int wave5_vpu_reset(struct device *dev, enum sw_reset_mode reset_mode); int wave5_vpu_build_up_dec_param(struct vpu_instance *inst, struct dec_open_param *param);