From patchwork Sat Apr 20 01:18:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WmhpIE1hbyAo5q+b5pm6KQ==?= X-Patchwork-Id: 13636884 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6BEEE8F44; Sat, 20 Apr 2024 01:19:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713575966; cv=none; b=kGWQGpRU+rqfizjoKMAWJpZdRzRxLiHcGQNqwmVT+oU6dtaPlTebTqqIqzF3u4ERsg/3u5+uWMseRGqfbuSh0IZNd29GuBQMYF1wnFM72LNPRI5FAQO/FxKpVAHGaO04luwM/aiW+sHTJjr56gFlwgMiZy/CH9nIFyBFzVTjI7s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1713575966; c=relaxed/simple; bh=OXaa3NpiW8ZRTq48nWACeZjOhEFcFTKNj0WD/cvueQA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=AZ/RDhBynxV7+HbD8Ba5XWJ7GDr+ghbYJBslNX4iGkFHVu9vTqP0xfW1+Ak7XlTQSBiSWLPztQLB3Tq/fSt85qCVbycc5VkzX6O+15PeuEhnMXnUilEKgwUooX92/lC1lSbWSpALZEKQED++50req55yLQqLBFHbe462TwpoAFk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=PKkxjzoe; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="PKkxjzoe" X-UUID: 030ec940feb411eeb8927bc1f75efef4-20240420 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=CO4wjtqJ7941YvsG3EoEYP8MkcYX0u3FXi2wAP8WwL8=; b=PKkxjzoegg3t/jTwhy91q8W1NAUHbIDj9Wf/WL9Rq87VqAhQE53sVNa/EtsSbI8aRqPLJNDvQKD5ZnnybZIrQ75+xupSFn1OCTtNQFSbBRqujjDrrZW+FhI+nZ6lZbLWRS4rG5zUMLDzK7Lj1xNdwSdCmOVeC+j1kXgqkmivA3c=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38,REQID:c3908f38-e875-4f13-b876-e7131d1c85b8,IP:0,U RL:25,TC:0,Content:0,EDM:-30,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTI ON:release,TS:-5 X-CID-META: VersionHash:82c5f88,CLOUDID:ff8d21fb-ed05-4274-9204-014369d201e8,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:2,IP:nil,UR L:11|1,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES: 1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR,TF_CID_SPAM_ULN X-UUID: 030ec940feb411eeb8927bc1f75efef4-20240420 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1776555860; Sat, 20 Apr 2024 09:19:19 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Sat, 20 Apr 2024 09:19:18 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Sat, 20 Apr 2024 09:19:16 +0800 From: Zhi Mao To: Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Matthias Brugger , AngeloGioacchino Del Regno , Zhi Mao , Philipp Zabel , Laurent Pinchart , Heiko Stuebner , Sakari Ailus , Hans Verkuil , Hans de Goede , Tomi Valkeinen , Alain Volmat , Paul Elder , Mehdi Djait , Andy Shevchenko , Bingbu Cao , , , , , , , , , <10572168@qq.com> Subject: [PATCH v1 1/2] media: dt-bindings: i2c: add Giantec GT97xx VCM Date: Sat, 20 Apr 2024 09:18:39 +0800 Message-ID: <20240420011840.23148-2-zhi.mao@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240420011840.23148-1-zhi.mao@mediatek.com> References: <20240420011840.23148-1-zhi.mao@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Add YAML device tree binding for GT9768 & GT8769 VCM, and the relevant MAINTAINERS entries. Signed-off-by: Zhi Mao Reviewed-by: Krzysztof Kozlowski --- .../bindings/media/i2c/giantec,gt9769.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/media/i2c/giantec,gt9769.yaml diff --git a/Documentation/devicetree/bindings/media/i2c/giantec,gt9769.yaml b/Documentation/devicetree/bindings/media/i2c/giantec,gt9769.yaml new file mode 100644 index 000000000000..6a9f49539b35 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/giantec,gt9769.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (c) 2020 MediaTek Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/giantec,gt9769.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Giantec Semiconductor, Crop. GT9768 & GT9769 Voice Coil Motor (VCM) + +maintainers: + - Zhi Mao + +description: |- + The Giantec GT9768 & GT9768 is a 10-bit DAC with current sink capability. + The DAC is controlled via I2C bus that operates at clock rates up to 1MHz. + This chip integrates Advanced Actuator Control (AAC) technology + and is intended for driving voice coil lens in camera modules. + +properties: + compatible: + enum: + - giantec,gt9768 + - giantec,gt9769 + + reg: + maxItems: 1 + + vin-supply: true + + vdd-supply: true + +required: + - compatible + - reg + - vin-supply + - vdd-supply + +additionalProperties: false + +examples: + - | + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + camera-lens@c { + compatible = "giantec,gt9769"; + reg = <0x0c>; + + vin-supply = <>97xx_vin>; + vdd-supply = <>97xx_vdd>; + }; + }; + +...