From patchwork Wed May 15 11:23:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WW9uZyBXdSAo5ZC05YuHKQ==?= X-Patchwork-Id: 13665128 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5D626EB55; Wed, 15 May 2024 11:25:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=60.244.123.138 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715772331; cv=none; b=L8m1Eh8dOwyqYj9IAhgI4MsmzOii0UYlM0uPkplAYGWfmTFXxO8GgefnysU/ZwWck64DW0SSWNjE4rEEUnorD7Tk+xn+ED8Wgkl/BhSZHUSyQ6zLSurryAMcZ9GBgtxbroWvjZHR7jQYCWBzoSVCbtMTUXWdjcKCCowDMum9R9I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1715772331; c=relaxed/simple; bh=0LqFjAIjsAuQUoO9CBziVYMXRN16bN6eWv52dYNZA04=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cU5truB72YW63x+IfwXWtVOOE8YJzeeWO+vlXgsr0QP8kEmx8/wpG/BhWKq8Tj1Db8Efxa559+5LBrgk0209wzWUq70/+io/zH5VPElU8mH2itb+KQ/Pkqq4rAeM9/55/egi41xZyPeEeoYLMCWuxKfgPUu28wyH9jk+kXdwucU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=XTraS+Ia; arc=none smtp.client-ip=60.244.123.138 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="XTraS+Ia" X-UUID: d119445c12ad11efb92737409a0e9459-20240515 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=pRII+MwEMjc7IBIb7T65bLDNnOYGy8L1r5/7E1ySfEk=; b=XTraS+Ia6U18kmDn890Uqw9sPEXJ3+G4x6Z4OJ9YFg2lLlvgPEoe4++0PR+c03dyKyqhMYz+VY56NyruHhFskQFY42k1jFiHTACtCglSm/Ws38y9HGTZcz3mLa3px67WfHumiqlHs6HYMJq8Z8NBDsplHWxfc/o9ZcI+EkdHJSk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.38,REQID:ffd7906c-23c2-49b4-90b3-c4a06efc92bb,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:82c5f88,CLOUDID:bb2ce383-4f93-4875-95e7-8c66ea833d57,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,RT:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1, SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: d119445c12ad11efb92737409a0e9459-20240515 Received: from mtkmbs11n2.mediatek.inc [(172.21.101.187)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 75818985; Wed, 15 May 2024 19:25:21 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 15 May 2024 19:25:20 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 15 May 2024 19:25:19 +0800 From: Yong Wu To: Rob Herring , Matthias Brugger , , Sumit Semwal , Andrew Morton CC: Krzysztof Kozlowski , Conor Dooley , Benjamin Gaignard , Brian Starkey , John Stultz , , AngeloGioacchino Del Regno , Yong Wu , , , , , , , , Robin Murphy , Vijayanand Jitta , Joakim Bech , Jeffrey Kardatzke , Pavel Machek , Simon Ser , Pekka Paalanen , , Logan Gunthorpe , Daniel Vetter , , , Subject: [PATCH v5 9/9] dma_buf: heaps: restricted_heap_mtk: Add a new CMA heap Date: Wed, 15 May 2024 19:23:08 +0800 Message-ID: <20240515112308.10171-10-yong.wu@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240515112308.10171-1-yong.wu@mediatek.com> References: <20240515112308.10171-1-yong.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MTK: N Create a new MediaTek CMA heap from the CMA reserved buffer. In this heap, When the first allocating buffer, use cma_alloc to prepare whole the CMA range, then send its range to TEE to protect and manage. For the later allocating, we just adds the cma_used_size. When SVP done, cma_release will release the buffer, then kernel may reuse it. For the "CMA" restricted heap, "struct cma *cma" is a common property, not just for MediaTek, so put it into "struct restricted_heap" instead of our private data. Signed-off-by: Yong Wu --- drivers/dma-buf/heaps/Kconfig | 2 +- drivers/dma-buf/heaps/restricted_heap.h | 4 + drivers/dma-buf/heaps/restricted_heap_mtk.c | 121 +++++++++++++++++++- 3 files changed, 123 insertions(+), 4 deletions(-) diff --git a/drivers/dma-buf/heaps/Kconfig b/drivers/dma-buf/heaps/Kconfig index 84f748fb2856..58903bc62ac8 100644 --- a/drivers/dma-buf/heaps/Kconfig +++ b/drivers/dma-buf/heaps/Kconfig @@ -24,7 +24,7 @@ config DMABUF_HEAPS_RESTRICTED config DMABUF_HEAPS_RESTRICTED_MTK bool "MediaTek DMA-BUF Restricted Heap" - depends on DMABUF_HEAPS_RESTRICTED && TEE=y + depends on DMABUF_HEAPS_RESTRICTED && DMA_CMA && TEE=y help Enable restricted dma-buf heaps for MediaTek platform. This heap is backed by TEE client interfaces. If in doubt, say N. diff --git a/drivers/dma-buf/heaps/restricted_heap.h b/drivers/dma-buf/heaps/restricted_heap.h index 8cb9211093c5..7dec4b8a471b 100644 --- a/drivers/dma-buf/heaps/restricted_heap.h +++ b/drivers/dma-buf/heaps/restricted_heap.h @@ -23,6 +23,10 @@ struct restricted_heap { const struct restricted_heap_ops *ops; + struct cma *cma; + unsigned long cma_paddr; + unsigned long cma_size; + void *priv_data; }; diff --git a/drivers/dma-buf/heaps/restricted_heap_mtk.c b/drivers/dma-buf/heaps/restricted_heap_mtk.c index e571eae719e0..6d8119828485 100644 --- a/drivers/dma-buf/heaps/restricted_heap_mtk.c +++ b/drivers/dma-buf/heaps/restricted_heap_mtk.c @@ -6,9 +6,11 @@ */ #define pr_fmt(fmt) "rheap_mtk: " fmt +#include #include #include #include +#include #include #include #include @@ -25,6 +27,13 @@ enum mtk_secure_mem_type { * management is inside the TEE. */ MTK_SECURE_MEMORY_TYPE_CM_TZ = 1, + /* + * MediaTek dynamic chunk memory carved out from CMA. + * In normal case, the CMA could be used in kernel; When SVP start, we will + * allocate whole this CMA and pass whole the CMA PA and size into TEE to + * protect it, then the detail memory management also is inside the TEE. + */ + MTK_SECURE_MEMORY_TYPE_CM_CMA = 2, }; /* This structure also is synchronized with tee, thus not use the phys_addr_t */ @@ -40,7 +49,8 @@ enum mtk_secure_buffer_tee_cmd { * [in] value[0].a: The buffer size. * value[0].b: alignment. * [in] value[1].a: enum mtk_secure_mem_type. - * [inout] + * [inout] [in] value[2].a: pa base in cma case. + * value[2].b: The buffer size in cma case. * [out] value[2].a: entry number of memory block. * If this is 1, it means the memory is continuous. * value[2].b: buffer PA base. @@ -73,6 +83,9 @@ struct mtk_restricted_heap_data { const enum mtk_secure_mem_type mem_type; + struct page *cma_page; + unsigned long cma_used_size; + struct mutex lock; /* lock for cma_used_size */ }; static int mtk_tee_ctx_match(struct tee_ioctl_version_data *ver, const void *data) @@ -173,6 +186,10 @@ static int mtk_tee_restrict_memory(struct restricted_heap *rheap, struct restric params[1].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INPUT; params[1].u.value.a = data->mem_type; params[2].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_INOUT; + if (rheap->cma && data->mem_type == MTK_SECURE_MEMORY_TYPE_CM_CMA) { + params[2].u.value.a = rheap->cma_paddr; + params[2].u.value.b = rheap->cma_size; + } params[3].attr = TEE_IOCTL_PARAM_ATTR_TYPE_VALUE_OUTPUT; ret = mtk_tee_service_call(data->tee_ctx, data->tee_session, MTK_TZCMD_SECMEM_ZALLOC, params); @@ -265,6 +282,48 @@ mtk_restricted_memory_free(struct restricted_heap *rheap, struct restricted_buff { } +static int mtk_restricted_memory_cma_allocate(struct restricted_heap *rheap, + struct restricted_buffer *buf) +{ + struct mtk_restricted_heap_data *data = rheap->priv_data; + int ret = 0; + /* + * Allocate CMA only when allocating buffer for the first time, and just + * increase cma_used_size at the other time, Actually the memory + * allocating is within the TEE. + */ + mutex_lock(&data->lock); + if (!data->cma_used_size) { + data->cma_page = cma_alloc(rheap->cma, rheap->cma_size >> PAGE_SHIFT, + get_order(PAGE_SIZE), false); + if (!data->cma_page) { + ret = -ENOMEM; + goto out_unlock; + } + } else if (data->cma_used_size + buf->size > rheap->cma_size) { + ret = -EINVAL; + goto out_unlock; + } + data->cma_used_size += buf->size; + +out_unlock: + mutex_unlock(&data->lock); + return ret; +} + +static void mtk_restricted_memory_cma_free(struct restricted_heap *rheap, + struct restricted_buffer *buf) +{ + struct mtk_restricted_heap_data *data = rheap->priv_data; + + mutex_lock(&data->lock); + data->cma_used_size -= buf->size; + if (!data->cma_used_size) + cma_release(rheap->cma, data->cma_page, + rheap->cma_size >> PAGE_SHIFT); + mutex_unlock(&data->lock); +} + static int mtk_restricted_heap_init(struct restricted_heap *rheap) { struct mtk_restricted_heap_data *data = rheap->priv_data; @@ -286,21 +345,77 @@ static struct mtk_restricted_heap_data mtk_restricted_heap_data = { .mem_type = MTK_SECURE_MEMORY_TYPE_CM_TZ, }; +static const struct restricted_heap_ops mtk_restricted_heap_ops_cma = { + .heap_init = mtk_restricted_heap_init, + .alloc = mtk_restricted_memory_cma_allocate, + .free = mtk_restricted_memory_cma_free, + .restrict_buf = mtk_tee_restrict_memory, + .unrestrict_buf = mtk_tee_unrestrict_memory, +}; + +static struct mtk_restricted_heap_data mtk_restricted_heap_data_cma = { + .mem_type = MTK_SECURE_MEMORY_TYPE_CM_CMA, +}; + static struct restricted_heap mtk_restricted_heaps[] = { { .name = "restricted_mtk_cm", .ops = &mtk_restricted_heap_ops, .priv_data = &mtk_restricted_heap_data, }, + { + .name = "restricted_mtk_cma", + .ops = &mtk_restricted_heap_ops_cma, + .priv_data = &mtk_restricted_heap_data_cma, + }, }; +static int __init mtk_restricted_cma_init(struct reserved_mem *rmem) +{ + struct restricted_heap *rheap = mtk_restricted_heaps, *rheap_cma = NULL; + struct mtk_restricted_heap_data *data; + struct cma *cma; + int ret, i; + + for (i = 0; i < ARRAY_SIZE(mtk_restricted_heaps); i++, rheap++) { + data = rheap->priv_data; + if (data->mem_type == MTK_SECURE_MEMORY_TYPE_CM_CMA) { + rheap_cma = rheap; + break; + } + } + if (!rheap_cma) + return -EINVAL; + + ret = cma_init_reserved_mem(rmem->base, rmem->size, 0, rmem->name, + &cma); + if (ret) { + pr_err("%s: %s set up CMA fail. ret %d.\n", __func__, rmem->name, ret); + return ret; + } + + rheap_cma->cma = cma; + rheap_cma->cma_paddr = rmem->base; + rheap_cma->cma_size = rmem->size; + return 0; +} + +RESERVEDMEM_OF_DECLARE(restricted_cma, "mediatek,dynamic-restricted-region", + mtk_restricted_cma_init); + static int mtk_restricted_heap_initialize(void) { struct restricted_heap *rheap = mtk_restricted_heaps; + struct mtk_restricted_heap_data *data; unsigned int i; - for (i = 0; i < ARRAY_SIZE(mtk_restricted_heaps); i++, rheap++) - restricted_heap_add(rheap); + for (i = 0; i < ARRAY_SIZE(mtk_restricted_heaps); i++, rheap++) { + data = rheap->priv_data; + if (data->mem_type == MTK_SECURE_MEMORY_TYPE_CM_CMA && !rheap->cma) + continue; + if (!restricted_heap_add(rheap)) + mutex_init(&data->lock); + } return 0; } module_init(mtk_restricted_heap_initialize);