From patchwork Tue Aug 13 23:00:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Acayan X-Patchwork-Id: 13762671 Received: from mail-ot1-f50.google.com (mail-ot1-f50.google.com [209.85.210.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8B02D1ABECF; Tue, 13 Aug 2024 23:00:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.50 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590056; cv=none; b=LAflF4uSyPHMJ8zTLBQY3xo/LiSlHvjEDtg5biRZr+WoCgqUurhUm+Jo9ENCzfBfQe+FhXyub1+3UvGWozi33WaGFoWWa5CNlRNEGo0ilFCW1aoX8AXPxX2ZRyzn9ofl11MQ4w/Xv/m6J1wyuvOTHG6+GGlHjXSLq3vkTYWYHJc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1723590056; c=relaxed/simple; bh=YX0Qq2kUDDdO4wAbeg//khEouqqY0Nj3d7OAM0J7UG4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ruPGNRUm2Q7Wmy+3Q4P0x2WLUgeR0FCzxrd73nlLrjUm4PuCuzl5JL+4BRND9D0lNIkosWNev7sj8qeHDSRhSfngLzmBGGad9O/GcvjvYM6Zw5neFeFJ65npiQUFjiCsK7xTi1ilD4tj2eH/W2Rno0vl2WkwuohjR8jMhzYTgP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Loqt4uqa; arc=none smtp.client-ip=209.85.210.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Loqt4uqa" Received: by mail-ot1-f50.google.com with SMTP id 46e09a7af769-7093d565310so4346286a34.2; Tue, 13 Aug 2024 16:00:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1723590053; x=1724194853; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZywuGlQZBGJLs0MygXdTUJJtx54MTpyPJPxIvhPx49c=; b=Loqt4uqaM/C6Yl+dsRG25vIljIi/imcn9AwC3kYMXB9EFqYByhyXoYZL5d/IJ6mscx ppL69DqX4mFtgO8/mSdwpGn18DHdZrMMzlx2LnOL+qNiGbSsz3EX1ou4dOUhUnFOHWvU T4/4oUH97mDwZF5Sdox5YoxRl36Hz/k+lOTbLl/Dr0gklCGFnpchvDxHxxK5gwHRzZQh EBqh+iYJcOe3ut1+GiUfgOyIf3K4CCww7GkzVVbSrOXcbBd5bAz8c4QAUQnpqtpNdHRp 8zrASvAFbYOEcq7uFcoVHE0nRb3BTpEEB3jT5IadKWMPNSskYkqtIOizXMx5oPl+HdF9 T4PA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723590053; x=1724194853; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZywuGlQZBGJLs0MygXdTUJJtx54MTpyPJPxIvhPx49c=; b=jZ/82yjWT3HuXQZkQyDKd0sJX1Ob0aq7y2d/hpv1gRZ+SvS9H8P2Tr8Ax9NkjJD9WT YLdzrD2p57+rVuZialandFWSV3s8gE7U/2w8dNzoqfW8AdQmjn0+ObAX2UZmdh+AfVl/ UAybzvw7iZdvHy2foVk3Gb5Fs/x5+I1w2JkUpnV9VmTUNETTxiulFBj7MsXXcHcTWwo/ DI67HhAA9XJdQGCqdp1fTEB8d5H2ORZ08KlKvkVkv1Wj9i+4isEpT36k/weIbr71+zcJ 6mkDWPJ2fA1Ck1hlPhtsvH3qoQ+pg5UlFwqkj1qt3iufR2KctQaSGbAmV+Lc1yAEnp9f 44mQ== X-Forwarded-Encrypted: i=1; AJvYcCVSaoWmRrETlRNk5DNKGgCdYNx4Qp2ZhL1pfBtT/5ggrnlePBxR7auzsEu7DlXg4TzzTvUxtg9kQ/s5/7Nlm9mW2aS3szebUsaTCqiVmhBO2F0T0/ZG2u9mK1imL0OlX9ncvn7NF1C5/t1OVL8yXzpvL0u3aZI5zkNUl8l03h6wsvHZIyW67245BOEHLmXRZ7NQkrR7t6woxWltkuJeWaXT4w== X-Gm-Message-State: AOJu0YxABmRhfOmOUt+BaHynbuu+avhk9gQX7eFNThfJGjSKoPkf0AZa OXeYQkds3PsjiggEJdib6duIjyezVOM7O5JQkx2phRIzBxm1ZZaY+C48Xlqb X-Google-Smtp-Source: AGHT+IEAb8XoVPQ2NaO7li9fGGEAIi5QOSiScDZ3IQHDmY2m+zU5cHdR3We9ap6s4w3+qcqQHe4v3Q== X-Received: by 2002:a05:6358:705:b0:1aa:cdba:4fa8 with SMTP id e5c5f4694b2df-1b1aab8625fmr107054355d.13.1723590053243; Tue, 13 Aug 2024 16:00:53 -0700 (PDT) Received: from localhost ([2607:fea8:52a3:d200:324c:b818:b179:79b]) by smtp.gmail.com with ESMTPSA id af79cd13be357-7a4c7e0419asm377694585a.118.2024.08.13.16.00.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Aug 2024 16:00:53 -0700 (PDT) From: Richard Acayan To: Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Todor Tomov , "Bryan O'Donoghue" , Mauro Carvalho Chehab , Bjorn Andersson , Konrad Dybcio , linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-media@vger.kernel.org Cc: Richard Acayan Subject: [PATCH v2 3/5] media: camss: add support for SDM670 camss Date: Tue, 13 Aug 2024 19:00:42 -0400 Message-ID: <20240813230037.84004-11-mailingradian@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240813230037.84004-8-mailingradian@gmail.com> References: <20240813230037.84004-8-mailingradian@gmail.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The camera subsystem for the SDM670 the same as on SDM845 except with 3 CSIPHY ports instead of 4. Add support for the SDM670 camera subsystem. Signed-off-by: Richard Acayan --- drivers/media/platform/qcom/camss/camss.c | 194 ++++++++++++++++++++++ 1 file changed, 194 insertions(+) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index 51b1d3550421..f5d8443d4157 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -584,6 +584,188 @@ static const struct camss_subdev_resources vfe_res_660[] = { } }; +static const struct camss_subdev_resources csiphy_res_670[] = { + /* CSIPHY0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy0", "csiphy0_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy0" }, + .interrupt = { "csiphy0" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy1", "csiphy1_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy1" }, + .interrupt = { "csiphy1" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + }, + + /* CSIPHY2 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "soc_ahb", "cpas_ahb", + "csiphy2", "csiphy2_timer" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 0 }, + { 19200000, 240000000, 269333333 } }, + .reg = { "csiphy2" }, + .interrupt = { "csiphy2" }, + .csiphy = { + .hw_ops = &csiphy_ops_3ph_1_0, + .formats = &csiphy_formats_sdm845 + } + } +}; + +static const struct camss_subdev_resources csid_res_670[] = { + /* CSID0 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe0", + "vfe0_cphy_rx", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid0" }, + .interrupt = { "csid0" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + }, + + /* CSID1 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe1", + "vfe1_cphy_rx", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid1" }, + .interrupt = { "csid1" }, + .csid = { + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + }, + + /* CSID2 */ + { + .regulators = { "vdda-phy", "vdda-pll" }, + .clock = { "cpas_ahb", "soc_ahb", "vfe_lite", + "vfe_lite_cphy_rx", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 384000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "csid2" }, + .interrupt = { "csid2" }, + .csid = { + .is_lite = true, + .hw_ops = &csid_ops_gen2, + .formats = &csid_formats_gen2 + } + } +}; + +static const struct camss_subdev_resources vfe_res_670[] = { + /* VFE0 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe0", "vfe0_axi", "csi0" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe0" }, + .interrupt = { "vfe0" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife0", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE1 */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe1", "vfe1_axi", "csi1" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 0 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe1" }, + .interrupt = { "vfe1" }, + .vfe = { + .line_num = 4, + .has_pd = true, + .pd_name = "ife1", + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + }, + + /* VFE-lite */ + { + .regulators = {}, + .clock = { "camnoc_axi", "cpas_ahb", "soc_ahb", + "vfe_lite", "csi2" }, + .clock_rate = { { 0 }, + { 0 }, + { 0 }, + { 100000000, 320000000, 404000000, 480000000, 600000000 }, + { 19200000, 75000000, 384000000, 538666667 } }, + .reg = { "vfe_lite" }, + .interrupt = { "vfe_lite" }, + .vfe = { + .is_lite = true, + .line_num = 4, + .hw_ops = &vfe_ops_170, + .formats_rdi = &vfe_formats_rdi_845, + .formats_pix = &vfe_formats_pix_845 + } + } +}; + static const struct camss_subdev_resources csiphy_res_845[] = { /* CSIPHY0 */ { @@ -2403,6 +2585,17 @@ static const struct camss_resources sdm660_resources = { .link_entities = camss_link_entities }; +static const struct camss_resources sdm670_resources = { + .version = CAMSS_845, + .csiphy_res = csiphy_res_670, + .csid_res = csid_res_670, + .vfe_res = vfe_res_670, + .csiphy_num = ARRAY_SIZE(csiphy_res_670), + .csid_num = ARRAY_SIZE(csid_res_670), + .vfe_num = ARRAY_SIZE(vfe_res_670), + .link_entities = camss_link_entities +}; + static const struct camss_resources sdm845_resources = { .version = CAMSS_845, .csiphy_res = csiphy_res_845, @@ -2447,6 +2640,7 @@ static const struct of_device_id camss_dt_match[] = { { .compatible = "qcom,msm8916-camss", .data = &msm8916_resources }, { .compatible = "qcom,msm8996-camss", .data = &msm8996_resources }, { .compatible = "qcom,sdm660-camss", .data = &sdm660_resources }, + { .compatible = "qcom,sdm670-camss", .data = &sdm670_resources }, { .compatible = "qcom,sdm845-camss", .data = &sdm845_resources }, { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources }, { .compatible = "qcom,sc8280xp-camss", .data = &sc8280xp_resources },