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Thu, 13 Mar 2025 18:43:40 +0000 (UTC) Received: from shalem.redhat.com (unknown [10.45.224.5]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id E6960300376F; Thu, 13 Mar 2025 18:43:37 +0000 (UTC) From: Hans de Goede To: Sakari Ailus , Heimir Thor Sverrisson Cc: Hans de Goede , Stanislaw Gruszka , Ingvar Hagelund , Joachim Reichel , Bryan O'Donoghue , Hao Yao , Mauro Carvalho Chehab , linux-media@vger.kernel.org Subject: [PATCH v8 06/14] media: ov02c10: ov02c10_check_hwcfg() improvements Date: Thu, 13 Mar 2025 19:43:06 +0100 Message-ID: <20250313184314.91410-7-hdegoede@redhat.com> In-Reply-To: <20250313184314.91410-1-hdegoede@redhat.com> References: <20250313184314.91410-1-hdegoede@redhat.com> Precedence: bulk X-Mailing-List: linux-media@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 ov02c10_check_hwcfg() improvements: - Drop unnecessary return -ENXIO when there is no fwnode, this is already caught by the fwnode_graph_get_next_endpoint() call - Use dev_err_probe() in ov02c10_check_hwcfg() - Make sure all error messages have '\n' at the end - Add missing fwnode_handle_put() on clock-frequency read errors - Check clock-frequency matches OV02C10_MCLK - Log an error on v4l2_fwnode_endpoint_alloc_parse() failure - ov02c10 code supports 1 or 2 lane setups not 2 or 4 lane setups - replace return -EINVAL no mipi-lanes mismatch with goto check_hwcfg_error to properly free the bus_cfg - Don't log an error in probe() when ov02c10_check_hwcfg() fails, in all cases ov02c10_check_hwcfg() already logs an error using dev_probe_err() and if the error is -EPROBE_DEFER then we don't want to keep logging that multiple times until the dependency is resolved (dev_probe_err() suppresses logging for -EPROBE_DEFER errors) Signed-off-by: Hans de Goede --- drivers/media/i2c/ov02c10.c | 55 +++++++++++++++++++++---------------- 1 file changed, 31 insertions(+), 24 deletions(-) diff --git a/drivers/media/i2c/ov02c10.c b/drivers/media/i2c/ov02c10.c index 4b1b41f74ca2..a6ea747243e6 100644 --- a/drivers/media/i2c/ov02c10.c +++ b/drivers/media/i2c/ov02c10.c @@ -921,30 +921,38 @@ static int ov02c10_check_hwcfg(struct device *dev, struct ov02c10 *ov02c10) struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = V4L2_MBUS_CSI2_DPHY }; - struct fwnode_handle *ep; - struct fwnode_handle *fwnode = dev_fwnode(dev); + struct fwnode_handle *ep, *fwnode = dev_fwnode(dev); unsigned long link_freq_bitmap; - u32 ext_clk; + u32 mclk; int ret; - if (!fwnode) - return -ENXIO; - - ep = fwnode_graph_get_next_endpoint(fwnode, NULL); + /* + * Sometimes the fwnode graph is initialized by the bridge driver, + * wait for this. + */ + ep = fwnode_graph_get_endpoint_by_id(fwnode, 0, 0, 0); if (!ep) - return -EPROBE_DEFER; + return dev_err_probe(dev, -EPROBE_DEFER, + "waiting for fwnode graph endpoint\n"); - ret = fwnode_property_read_u32(dev_fwnode(dev), "clock-frequency", - &ext_clk); + ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk); if (ret) { - dev_err(dev, "can't get clock frequency"); - return ret; + fwnode_handle_put(ep); + return dev_err_probe(dev, ret, + "reading clock-frequency property\n"); + } + + if (mclk != OV02C10_MCLK) { + fwnode_handle_put(ep); + return dev_err_probe(dev, -EINVAL, + "external clock %u is not supported\n", + mclk); } ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg); fwnode_handle_put(ep); if (ret) - return ret; + return dev_err_probe(dev, ret, "parsing endpoint failed\n"); ret = v4l2_link_freq_to_bitmap(dev, bus_cfg.link_frequencies, bus_cfg.nr_of_link_frequencies, @@ -952,22 +960,23 @@ static int ov02c10_check_hwcfg(struct device *dev, struct ov02c10 *ov02c10) ARRAY_SIZE(link_freq_menu_items), &link_freq_bitmap); if (ret) - goto out_err; + goto check_hwcfg_error; /* v4l2_link_freq_to_bitmap() guarantees at least 1 bit is set */ ov02c10->link_freq_index = ffs(link_freq_bitmap) - 1; - if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2 && - bus_cfg.bus.mipi_csi2.num_data_lanes != 4) { - dev_err(dev, "number of CSI2 data lanes %d is not supported", - bus_cfg.bus.mipi_csi2.num_data_lanes); - return(-EINVAL); + if (bus_cfg.bus.mipi_csi2.num_data_lanes != 1 && + bus_cfg.bus.mipi_csi2.num_data_lanes != 2) { + ret = dev_err_probe(dev, -EINVAL, + "number of CSI2 data lanes %u is not supported\n", + bus_cfg.bus.mipi_csi2.num_data_lanes); + goto check_hwcfg_error; } + ov02c10->mipi_lanes = bus_cfg.bus.mipi_csi2.num_data_lanes; -out_err: +check_hwcfg_error: v4l2_fwnode_endpoint_free(&bus_cfg); - return ret; } @@ -994,10 +1003,8 @@ static int ov02c10_probe(struct i2c_client *client) /* Check HW config */ ret = ov02c10_check_hwcfg(&client->dev, ov02c10); - if (ret) { - dev_err(&client->dev, "failed to check hwcfg: %d", ret); + if (ret) return ret; - } v4l2_i2c_subdev_init(&ov02c10->sd, client, &ov02c10_subdev_ops); ov02c10_get_pm_resources(&client->dev);