Message ID | 384bc1320658b93b43838a337b37d52dc8485df2.1729230718.git.mchehab+huawei@kernel.org (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | Media: fix several issues on drivers | expand |
Hi Mauro, Mauro Carvalho Chehab <mchehab+huawei@kernel.org> writes: > The PLL checks are comparing 64 bit integers with 32 bit > ones, as reported by Coverity. Depending on the values of > the variables, this may underflow. > > Fix it ensuring that both sides of the expression are u64. > > Fixes: 852b50aeed15 ("media: On Semi AR0521 sensor driver") > Cc: stable@vger.kernel.org > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> > Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Krzysztof Hałasa <khalasa@piap.pl> > --- a/drivers/media/i2c/ar0521.c > +++ b/drivers/media/i2c/ar0521.c > @@ -255,10 +255,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult > continue; /* Minimum value */ > if (new_mult > 254) > break; /* Maximum, larger pre won't work either */ > - if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN * > + if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN * > new_pre) > continue; > - if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX * > + if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX * > new_pre) > break; /* Larger pre won't work either */ > new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,
diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c index fc27238dd4d3..24873149096c 100644 --- a/drivers/media/i2c/ar0521.c +++ b/drivers/media/i2c/ar0521.c @@ -255,10 +255,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult continue; /* Minimum value */ if (new_mult > 254) break; /* Maximum, larger pre won't work either */ - if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN * + if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN * new_pre) continue; - if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX * + if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX * new_pre) break; /* Larger pre won't work either */ new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,