From patchwork Sun Jan 2 16:16:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abylai Ospan X-Patchwork-Id: 446351 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p02GmtpL027982 for ; Sun, 2 Jan 2011 16:48:55 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753924Ab1ABQsZ (ORCPT ); Sun, 2 Jan 2011 11:48:25 -0500 Received: from utm.netup.ru ([193.203.36.250]:57680 "EHLO utm.netup.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753894Ab1ABQsZ (ORCPT ); Sun, 2 Jan 2011 11:48:25 -0500 X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Sun, 02 Jan 2011 16:48:55 +0000 (UTC) X-Greylist: delayed 1787 seconds by postgrey-1.27 at vger.kernel.org; Sun, 02 Jan 2011 11:48:25 EST Received: from alkaloid.netup.ru (alkaloid.netup [10.1.2.137]) by utm.netup.ru (Postfix) with ESMTP id CD89835FE14; Sun, 2 Jan 2011 19:11:34 +0300 (MSK) Message-ID: <4D20A4CA.4020601@netup.ru> Date: Sun, 02 Jan 2011 16:16:10 +0000 From: Abylay Ospan User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.7) Gecko/20100713 Thunderbird/3.1.1 MIME-Version: 1.0 To: mchehab@infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5 v2] cx23885: Altera FPGA CI interface reworked. Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c index 6c144f7..53c2b6d 100644 --- a/drivers/media/video/cx23885/cx23885-dvb.c +++ b/drivers/media/video/cx23885/cx23885-dvb.c @@ -620,29 +620,29 @@ int netup_altera_fpga_rw(void *device, int flag, int data, int read) { struct cx23885_dev *dev = (struct cx23885_dev *)device; unsigned long timeout = jiffies + msecs_to_jiffies(1); - int mem = 0; + uint32_t mem = 0; - cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); + mem = cx_read(MC417_RWD); if (read) cx_set(MC417_OEN, ALT_DATA); else { cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */ - mem = cx_read(MC417_RWD); mem &= ~ALT_DATA; mem |= (data & ALT_DATA); - cx_write(MC417_RWD, mem); } if (flag) - cx_set(MC417_RWD, ALT_AD_RG);/* ADDR */ + mem |= ALT_AD_RG; else - cx_clear(MC417_RWD, ALT_AD_RG);/* VAL */ + mem &= ~ALT_AD_RG; - cx_clear(MC417_RWD, ALT_CS);/* ~CS */ + mem &= ~ALT_CS; if (read) - cx_clear(MC417_RWD, ALT_RD); + mem = (mem & ~ALT_RD) | ALT_WR; else - cx_clear(MC417_RWD, ALT_WR); + mem = (mem & ~ALT_WR) | ALT_RD; + + cx_write(MC417_RWD, mem); /* start RW cycle */ for (;;) { mem = cx_read(MC417_RWD); -- 1.7.1