From patchwork Mon Apr 16 16:37:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 10343465 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7275C60542 for ; Mon, 16 Apr 2018 16:37:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5AED928815 for ; Mon, 16 Apr 2018 16:37:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4F9E42881C; Mon, 16 Apr 2018 16:37:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 700F528815 for ; Mon, 16 Apr 2018 16:37:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752308AbeDPQhY (ORCPT ); Mon, 16 Apr 2018 12:37:24 -0400 Received: from osg.samsung.com ([64.30.133.232]:51877 "EHLO osg.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751002AbeDPQhW (ORCPT ); Mon, 16 Apr 2018 12:37:22 -0400 Received: from localhost (localhost [127.0.0.1]) by osg.samsung.com (Postfix) with ESMTP id 3FFE526EB6; Mon, 16 Apr 2018 09:37:22 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at dev.s-opensource.com X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" Received: from osg.samsung.com ([127.0.0.1]) by localhost (localhost [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bWeB79YSYcaW; Mon, 16 Apr 2018 09:37:20 -0700 (PDT) Received: from smtp.s-opensource.com (unknown [201.86.164.1]) by osg.samsung.com (Postfix) with ESMTPSA id 2F65F26E59; Mon, 16 Apr 2018 09:37:16 -0700 (PDT) Received: from mchehab by smtp.s-opensource.com with local (Exim 4.90_1) (envelope-from ) id 1f877x-0004Aa-Ax; Mon, 16 Apr 2018 12:37:13 -0400 From: Mauro Carvalho Chehab Cc: Mauro Carvalho Chehab , Linux Media Mailing List , Mauro Carvalho Chehab , Alan Cox , Sakari Ailus , Greg Kroah-Hartman , Andy Shevchenko , Arnd Bergmann , Dan Carpenter , devel@driverdev.osuosl.org Subject: [PATCH 3/9] media: atomisp: ov2680.h: fix identation Date: Mon, 16 Apr 2018 12:37:06 -0400 Message-Id: <50289b066bcfb351ac07ef221b76335b3f202393.1523896259.git.mchehab@s-opensource.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: References: In-Reply-To: References: To: unlisted-recipients:; (no To-header on input) Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The identation for several tables there are broken. Signed-off-by: Mauro Carvalho Chehab --- drivers/staging/media/atomisp/i2c/ov2680.h | 895 ++++++++++++++--------------- 1 file changed, 447 insertions(+), 448 deletions(-) diff --git a/drivers/staging/media/atomisp/i2c/ov2680.h b/drivers/staging/media/atomisp/i2c/ov2680.h index cb38e6e79409..c83ae379f517 100644 --- a/drivers/staging/media/atomisp/i2c/ov2680.h +++ b/drivers/staging/media/atomisp/i2c/ov2680.h @@ -299,131 +299,131 @@ struct ov2680_format { * 176x144 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QCIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x47}, - {OV2680_8BIT, 0x3808, 0x00}, - {OV2680_8BIT, 0x3809, 0xC0}, - {OV2680_8BIT, 0x380a, 0x00}, - {OV2680_8BIT, 0x380b, 0xa0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4000, 0x81}, - {OV2680_8BIT, 0x4001, 0x40}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x47}, + {OV2680_8BIT, 0x3808, 0x00}, + {OV2680_8BIT, 0x3809, 0xC0}, + {OV2680_8BIT, 0x380a, 0x00}, + {OV2680_8BIT, 0x380b, 0xa0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4000, 0x81}, + {OV2680_8BIT, 0x4001, 0x40}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* * 352x288 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_CIF_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x8f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0xe7}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x70}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x30}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x8f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0xe7}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x70}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x30}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* * 336x256 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_QVGA_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x03}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x02}, - {OV2680_8BIT, 0x3807, 0x87}, - {OV2680_8BIT, 0x3808, 0x01}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0x00}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x03}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x02}, + {OV2680_8BIT, 0x3807, 0x87}, + {OV2680_8BIT, 0x3808, 0x01}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0x00}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; @@ -431,259 +431,259 @@ struct ov2680_format { * 656x496 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_656x496_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x24}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xcf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x67}, - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0x90}, - {OV2680_8BIT, 0x380a, 0x01}, - {OV2680_8BIT, 0x380b, 0xf0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xb0}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x04}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x04}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x24}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xcf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x67}, + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0x90}, + {OV2680_8BIT, 0x380a, 0x01}, + {OV2680_8BIT, 0x380b, 0xf0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xb0}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x04}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x04}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* * 800x600 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_720x592_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; - {OV2680_8BIT, 0x3808, 0x02}, - {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, // HTS; - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, // VTS; - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x02}, - {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; - {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; - {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; - {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; - // BIT[3]: Mirror order, BG or GB; - // BIT[2]: Flip order, BR or RB; - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, // X_ADDR_START; + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, // Y_ADDR_START; + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xaf}, // X_ADDR_END; + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xaf}, // Y_ADDR_END; + {OV2680_8BIT, 0x3808, 0x02}, + {OV2680_8BIT, 0x3809, 0xd0}, // X_OUTPUT_SIZE; + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x50}, // Y_OUTPUT_SIZE; + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, // HTS; + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, // VTS; + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x02}, + {OV2680_8BIT, 0x5705, 0xd0}, // X_WIN; + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x50}, // Y_WIN; + {OV2680_8BIT, 0x3820, 0xc2}, // FLIP_FORMAT; + {OV2680_8BIT, 0x3821, 0x01}, // MIRROR_FORMAT; + {OV2680_8BIT, 0x5090, 0x00}, // PRE ISP CTRL16, default value is 0x0C; + // BIT[3]: Mirror order, BG or GB; + // BIT[2]: Flip order, BR or RB; + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} }; /* * 800x600 30fps VBlanking 1lane 10Bit (binning) */ static struct ov2680_reg const ov2680_800x600_30fps[] = { - {OV2680_8BIT, 0x3086, 0x01}, - {OV2680_8BIT, 0x3501, 0x26}, - {OV2680_8BIT, 0x3502, 0x40}, - {OV2680_8BIT, 0x370a, 0x23}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x03}, - {OV2680_8BIT, 0x3809, 0x20}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0x58}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xac}, - {OV2680_8BIT, 0x380e, 0x02}, - {OV2680_8BIT, 0x380f, 0x84}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x31}, - {OV2680_8BIT, 0x3815, 0x31}, - {OV2680_8BIT, 0x5708, 0x00}, - {OV2680_8BIT, 0x5704, 0x03}, - {OV2680_8BIT, 0x5705, 0x20}, - {OV2680_8BIT, 0x5706, 0x02}, - {OV2680_8BIT, 0x5707, 0x58}, - {OV2680_8BIT, 0x3820, 0xc2}, - {OV2680_8BIT, 0x3821, 0x01}, - {OV2680_8BIT, 0x5090, 0x00}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x03}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x01}, + {OV2680_8BIT, 0x3501, 0x26}, + {OV2680_8BIT, 0x3502, 0x40}, + {OV2680_8BIT, 0x370a, 0x23}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x03}, + {OV2680_8BIT, 0x3809, 0x20}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0x58}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xac}, + {OV2680_8BIT, 0x380e, 0x02}, + {OV2680_8BIT, 0x380f, 0x84}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x31}, + {OV2680_8BIT, 0x3815, 0x31}, + {OV2680_8BIT, 0x5708, 0x00}, + {OV2680_8BIT, 0x5704, 0x03}, + {OV2680_8BIT, 0x5705, 0x20}, + {OV2680_8BIT, 0x5706, 0x02}, + {OV2680_8BIT, 0x5707, 0x58}, + {OV2680_8BIT, 0x3820, 0xc2}, + {OV2680_8BIT, 0x3821, 0x01}, + {OV2680_8BIT, 0x5090, 0x00}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x03}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_TOK_TERM, 0, 0} }; /* * 720p=1280*720 30fps VBlanking 1lane 10Bit (no-Scaling) */ static struct ov2680_reg const ov2680_720p_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0xf2}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x03}, - {OV2680_8BIT, 0x3807, 0xdd}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x02}, - {OV2680_8BIT, 0x380b, 0xe0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x06}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0xf2}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x03}, + {OV2680_8BIT, 0x3807, 0xdd}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x02}, + {OV2680_8BIT, 0x380b, 0xe0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x06}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* * 1296x976 30fps VBlanking 1lane 10Bit(no-scaling) */ static struct ov2680_reg const ov2680_1296x976_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0xa0}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x05}, - {OV2680_8BIT, 0x3805, 0xbf}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x57}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0x10}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0xd0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, //miror/flip - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0xa0}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x05}, + {OV2680_8BIT, 0x3805, 0xbf}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x57}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0x10}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0xd0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, //miror/flip + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* * 1456*1096 30fps VBlanking 1lane 10bit(no-scaling) */ static struct ov2680_reg const ov2680_1456x1096_30fps[]= { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x90}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x78}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xC0}, - {OV2680_8BIT, 0x3808, 0x05}, - {OV2680_8BIT, 0x3809, 0xb0}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x48}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x08}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x10}, - {OV2680_8BIT, 0x5705, 0xa0}, - {OV2680_8BIT, 0x5706, 0x0c}, - {OV2680_8BIT, 0x5707, 0x78}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0c}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x90}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x78}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xC0}, + {OV2680_8BIT, 0x3808, 0x05}, + {OV2680_8BIT, 0x3809, 0xb0}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x48}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x08}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x00}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x10}, + {OV2680_8BIT, 0x5705, 0xa0}, + {OV2680_8BIT, 0x5706, 0x0c}, + {OV2680_8BIT, 0x5707, 0x78}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0c}, + {OV2680_TOK_TERM, 0, 0} }; /* @@ -691,129 +691,128 @@ struct ov2680_format { */ static struct ov2680_reg const ov2680_1616x916_30fps[] = { - - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x96}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0x39}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x03}, - {OV2680_8BIT, 0x380b, 0x94}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x08}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x03}, - {OV2680_8BIT, 0x5707, 0x94}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x96}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0x39}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x03}, + {OV2680_8BIT, 0x380b, 0x94}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x08}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x03}, + {OV2680_8BIT, 0x5707, 0x94}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} }; /* * 1612x1212 30fps VBlanking 1lane 10Bit */ static struct ov2680_reg const ov2680_1616x1082_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x86}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50}, - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0x3a}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0x3a}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_8BIT, 0x4008, 0x02}, - {OV2680_8BIT, 0x4009, 0x09}, - {OV2680_8BIT, 0x5081, 0x41}, + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x86}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50}, + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0x3a}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0x3a}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_8BIT, 0x4008, 0x02}, + {OV2680_8BIT, 0x4009, 0x09}, + {OV2680_8BIT, 0x5081, 0x41}, {OV2680_TOK_TERM, 0, 0} }; /* * 1616x1216 30fps VBlanking 1lane 10Bit */ static struct ov2680_reg const ov2680_1616x1216_30fps[] = { - {OV2680_8BIT, 0x3086, 0x00}, - {OV2680_8BIT, 0x3501, 0x48}, - {OV2680_8BIT, 0x3502, 0xe0}, - {OV2680_8BIT, 0x370a, 0x21}, - {OV2680_8BIT, 0x3801, 0x00}, - {OV2680_8BIT, 0x3802, 0x00}, - {OV2680_8BIT, 0x3803, 0x00}, - {OV2680_8BIT, 0x3804, 0x06}, - {OV2680_8BIT, 0x3805, 0x4f}, - {OV2680_8BIT, 0x3806, 0x04}, - {OV2680_8BIT, 0x3807, 0xbf}, - {OV2680_8BIT, 0x3808, 0x06}, - {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip - {OV2680_8BIT, 0x380a, 0x04}, - {OV2680_8BIT, 0x380b, 0xc0},//c0}, - {OV2680_8BIT, 0x380c, 0x06}, - {OV2680_8BIT, 0x380d, 0xa8}, - {OV2680_8BIT, 0x380e, 0x05}, - {OV2680_8BIT, 0x380f, 0x0e}, - {OV2680_8BIT, 0x3810, 0x00}, - {OV2680_8BIT, 0x3811, 0x00}, - {OV2680_8BIT, 0x3812, 0x00}, - {OV2680_8BIT, 0x3813, 0x00}, - {OV2680_8BIT, 0x3814, 0x11}, - {OV2680_8BIT, 0x3815, 0x11}, - {OV2680_8BIT, 0x4008, 0x00}, - {OV2680_8BIT, 0x4009, 0x0b}, - {OV2680_8BIT, 0x5081, 0x01}, - {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 - {OV2680_8BIT, 0x5704, 0x06}, - {OV2680_8BIT, 0x5705, 0x50}, - {OV2680_8BIT, 0x5706, 0x04}, - {OV2680_8BIT, 0x5707, 0xcc}, - {OV2680_8BIT, 0x3820, 0xc0}, - {OV2680_8BIT, 0x3821, 0x00}, - // {OV2680_8BIT, 0x5090, 0x0C}, - {OV2680_TOK_TERM, 0, 0} + {OV2680_8BIT, 0x3086, 0x00}, + {OV2680_8BIT, 0x3501, 0x48}, + {OV2680_8BIT, 0x3502, 0xe0}, + {OV2680_8BIT, 0x370a, 0x21}, + {OV2680_8BIT, 0x3801, 0x00}, + {OV2680_8BIT, 0x3802, 0x00}, + {OV2680_8BIT, 0x3803, 0x00}, + {OV2680_8BIT, 0x3804, 0x06}, + {OV2680_8BIT, 0x3805, 0x4f}, + {OV2680_8BIT, 0x3806, 0x04}, + {OV2680_8BIT, 0x3807, 0xbf}, + {OV2680_8BIT, 0x3808, 0x06}, + {OV2680_8BIT, 0x3809, 0x50},//50},//4line for mirror and flip + {OV2680_8BIT, 0x380a, 0x04}, + {OV2680_8BIT, 0x380b, 0xc0},//c0}, + {OV2680_8BIT, 0x380c, 0x06}, + {OV2680_8BIT, 0x380d, 0xa8}, + {OV2680_8BIT, 0x380e, 0x05}, + {OV2680_8BIT, 0x380f, 0x0e}, + {OV2680_8BIT, 0x3810, 0x00}, + {OV2680_8BIT, 0x3811, 0x00}, + {OV2680_8BIT, 0x3812, 0x00}, + {OV2680_8BIT, 0x3813, 0x00}, + {OV2680_8BIT, 0x3814, 0x11}, + {OV2680_8BIT, 0x3815, 0x11}, + {OV2680_8BIT, 0x4008, 0x00}, + {OV2680_8BIT, 0x4009, 0x0b}, + {OV2680_8BIT, 0x5081, 0x01}, + {OV2680_8BIT, 0x5708, 0x01}, //add for full size flip off and mirror off 2014/09/11 + {OV2680_8BIT, 0x5704, 0x06}, + {OV2680_8BIT, 0x5705, 0x50}, + {OV2680_8BIT, 0x5706, 0x04}, + {OV2680_8BIT, 0x5707, 0xcc}, + {OV2680_8BIT, 0x3820, 0xc0}, + {OV2680_8BIT, 0x3821, 0x00}, + // {OV2680_8BIT, 0x5090, 0x0C}, + {OV2680_TOK_TERM, 0, 0} }; static struct ov2680_resolution ov2680_res_preview[] = {