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[2003:62:5f55:ba00:84bb:b7f:fe67:66b9]) by smtp.googlemail.com with ESMTPSA id n5sm29346097wmf.3.2015.12.30.08.46.48 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 30 Dec 2015 08:46:48 -0800 (PST) From: Heiner Kallweit Subject: [PATCH 07/16] media: rc: nuvoton-cir: fix setting ioport base address To: Mauro Carvalho Chehab Cc: linux-media@vger.kernel.org Message-ID: <5684095D.8030001@gmail.com> Date: Wed, 30 Dec 2015 17:42:05 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:38.0) Gecko/20100101 Thunderbird/38.5.0 MIME-Version: 1.0 Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP At least on Zotac CI321 ACPI provides an ioport range for the wake up part but accessing these ioports has no effect. Instead the ioport base address is set to another value already (0xa20 in my case) and accessing this ioport range works. Therefore set a new ioport base address only if the current ioport base address is 0 (register reset default). The need to use the existing base address instead of trying to set an own one doesn't seem to be limited to this specific device as other drivers like hwmon/nct6775 do it the same way. This change was successfully tested on the mentioned device. And the change should be generic enough to not break the driver for other chips (however due to lack of appropriate hardware I wasn't able to test this). Signed-off-by: Heiner Kallweit --- drivers/media/rc/nuvoton-cir.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/media/rc/nuvoton-cir.c b/drivers/media/rc/nuvoton-cir.c index f624851..342e21d 100644 --- a/drivers/media/rc/nuvoton-cir.c +++ b/drivers/media/rc/nuvoton-cir.c @@ -161,6 +161,22 @@ static u8 nvt_cir_wake_reg_read(struct nvt_dev *nvt, u8 offset) return val; } +/* don't override io address if one is set already */ +static void nvt_set_ioaddr(struct nvt_dev *nvt, unsigned long *ioaddr) +{ + unsigned long old_addr; + + old_addr = nvt_cr_read(nvt, CR_CIR_BASE_ADDR_HI) << 8; + old_addr |= nvt_cr_read(nvt, CR_CIR_BASE_ADDR_LO); + + if (old_addr) + *ioaddr = old_addr; + else { + nvt_cr_write(nvt, *ioaddr >> 8, CR_CIR_BASE_ADDR_HI); + nvt_cr_write(nvt, *ioaddr & 0xff, CR_CIR_BASE_ADDR_LO); + } +} + /* dump current cir register contents */ static void cir_dump_regs(struct nvt_dev *nvt) { @@ -333,8 +349,7 @@ static void nvt_cir_ldev_init(struct nvt_dev *nvt) nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR); nvt_cr_write(nvt, LOGICAL_DEV_ENABLE, CR_LOGICAL_DEV_EN); - nvt_cr_write(nvt, nvt->cir_addr >> 8, CR_CIR_BASE_ADDR_HI); - nvt_cr_write(nvt, nvt->cir_addr & 0xff, CR_CIR_BASE_ADDR_LO); + nvt_set_ioaddr(nvt, &nvt->cir_addr); nvt_cr_write(nvt, nvt->cir_irq, CR_CIR_IRQ_RSRC); @@ -358,8 +373,7 @@ static void nvt_cir_wake_ldev_init(struct nvt_dev *nvt) nvt_select_logical_dev(nvt, LOGICAL_DEV_CIR_WAKE); nvt_cr_write(nvt, LOGICAL_DEV_ENABLE, CR_LOGICAL_DEV_EN); - nvt_cr_write(nvt, nvt->cir_wake_addr >> 8, CR_CIR_BASE_ADDR_HI); - nvt_cr_write(nvt, nvt->cir_wake_addr & 0xff, CR_CIR_BASE_ADDR_LO); + nvt_set_ioaddr(nvt, &nvt->cir_wake_addr); nvt_cr_write(nvt, nvt->cir_wake_irq, CR_CIR_IRQ_RSRC);