@@ -1,13 +1,9 @@
-/*
- * GHES/EDAC Linux driver
- *
- * This file may be distributed under the terms of the GNU General Public
- * License version 2.
- *
- * Copyright (c) 2013 by Mauro Carvalho Chehab
- *
- * Red Hat Inc. http://www.redhat.com
- */
+// SPDX-License-Identifier: GPL-2.0
+// GHES/EDAC Linux driver
+//
+// Copyright (c) 2013 by Mauro Carvalho Chehab
+//
+// Red Hat Inc. http://www.redhat.com
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
@@ -1,28 +1,26 @@
-/*
- * Intel 5400 class Memory Controllers kernel module (Seaburg)
- *
- * This file may be distributed under the terms of the
- * GNU General Public License.
- *
- * Copyright (c) 2008 by:
- * Ben Woodard <woodard@redhat.com>
- * Mauro Carvalho Chehab
- *
- * Red Hat Inc. http://www.redhat.com
- *
- * Forked and adapted from the i5000_edac driver which was
- * written by Douglas Thompson Linux Networx <norsk5@xmission.com>
- *
- * This module is based on the following document:
- *
- * Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
- * http://developer.intel.com/design/chipsets/datashts/313070.htm
- *
- * This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each with
- * 2 channels operating in lockstep no-mirror mode. Each channel can have up to
- * 4 dimm's, each with up to 8GB.
- *
- */
+// SPDX-License-Identifier: GPL-2.0
+// Intel 5400 class Memory Controllers kernel module (Seaburg)
+//
+// This file may be distributed under the terms of the
+// GNU General Public License.
+//
+// Copyright (c) 2008 by:
+// Ben Woodard <woodard@redhat.com>
+// Mauro Carvalho Chehab
+//
+// Red Hat Inc. http://www.redhat.com
+//
+// Forked and adapted from the i5000_edac driver which was
+// written by Douglas Thompson Linux Networx <norsk5@xmission.com>
+//
+// This module is based on the following document:
+//
+// Intel 5400 Chipset Memory Controller Hub (MCH) - Datasheet
+// http://developer.intel.com/design/chipsets/datashts/313070.htm
+//
+// This Memory Controller manages DDR2 FB-DIMMs. It has 2 branches, each with
+// 2 channels operating in lockstep no-mirror mode. Each channel can have up to
+// 4 dimm's, each with up to 8GB.
#include <linux/module.h>
#include <linux/init.h>
@@ -1467,7 +1465,7 @@ static void __exit i5400_exit(void)
module_init(i5400_init);
module_exit(i5400_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Ben Woodard <woodard@redhat.com>");
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
@@ -1,22 +1,18 @@
-/*
- * Intel 7300 class Memory Controllers kernel module (Clarksboro)
- *
- * This file may be distributed under the terms of the
- * GNU General Public License version 2 only.
- *
- * Copyright (c) 2010 by:
- * Mauro Carvalho Chehab
- *
- * Red Hat Inc. http://www.redhat.com
- *
- * Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
- * http://www.intel.com/Assets/PDF/datasheet/318082.pdf
- *
- * TODO: The chipset allow checking for PCI Express errors also. Currently,
- * the driver covers only memory error errors
- *
- * This driver uses "csrows" EDAC attribute to represent DIMM slot#
- */
+// SPDX-License-Identifier: GPL-2.0
+// Intel 7300 class Memory Controllers kernel module (Clarksboro)
+//
+// Copyright (c) 2010 by:
+// Mauro Carvalho Chehab
+//
+// Red Hat Inc. http://www.redhat.com
+//
+// Intel 7300 Chipset Memory Controller Hub (MCH) - Datasheet
+// http://www.intel.com/Assets/PDF/datasheet/318082.pdf
+//
+// TODO: The chipset allow checking for PCI Express errors also. Currently,
+// the driver covers only memory error errors
+//
+// This driver uses "csrows" EDAC attribute to represent DIMM slot#
#include <linux/module.h>
#include <linux/init.h>
@@ -1207,7 +1203,7 @@ static void __exit i7300_exit(void)
module_init(i7300_init);
module_exit(i7300_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
MODULE_DESCRIPTION("MC Driver for Intel I7300 memory controllers - "
@@ -1,29 +1,26 @@
-/* Intel i7 core/Nehalem Memory Controller kernel module
- *
- * This driver supports the memory controllers found on the Intel
- * processor families i7core, i7core 7xx/8xx, i5core, Xeon 35xx,
- * Xeon 55xx and Xeon 56xx also known as Nehalem, Nehalem-EP, Lynnfield
- * and Westmere-EP.
- *
- * This file may be distributed under the terms of the
- * GNU General Public License version 2 only.
- *
- * Copyright (c) 2009-2010 by:
- * Mauro Carvalho Chehab
- *
- * Red Hat Inc. http://www.redhat.com
- *
- * Forked and adapted from the i5400_edac driver
- *
- * Based on the following public Intel datasheets:
- * Intel Core i7 Processor Extreme Edition and Intel Core i7 Processor
- * Datasheet, Volume 2:
- * http://download.intel.com/design/processor/datashts/320835.pdf
- * Intel Xeon Processor 5500 Series Datasheet Volume 2
- * http://www.intel.com/Assets/PDF/datasheet/321322.pdf
- * also available at:
- * http://www.arrownac.com/manufacturers/intel/s/nehalem/5500-datasheet-v2.pdf
- */
+// SPDX-License-Identifier: GPL-2.0
+// Intel i7 core/Nehalem Memory Controller kernel module
+//
+// This driver supports the memory controllers found on the Intel
+// processor families i7core, i7core 7xx/8xx, i5core, Xeon 35xx,
+// Xeon 55xx and Xeon 56xx also known as Nehalem, Nehalem-EP, Lynnfield
+// and Westmere-EP.
+//
+// Copyright (c) 2009-2010 by:
+// Mauro Carvalho Chehab
+//
+// Red Hat Inc. http://www.redhat.com
+//
+// Forked and adapted from the i5400_edac driver
+//
+// Based on the following public Intel datasheets:
+// Intel Core i7 Processor Extreme Edition and Intel Core i7 Processor
+// Datasheet, Volume 2:
+// http://download.intel.com/design/processor/datashts/320835.pdf
+// Intel Xeon Processor 5500 Series Datasheet Volume 2
+// http://www.intel.com/Assets/PDF/datasheet/321322.pdf
+// also available at:
+// http://www.arrownac.com/manufacturers/intel/s/nehalem/5500-datasheet-v2.pdf
#include <linux/module.h>
#include <linux/init.h>
@@ -2384,7 +2381,7 @@ static void __exit i7core_exit(void)
module_init(i7core_init);
module_exit(i7core_exit);
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
MODULE_DESCRIPTION("MC Driver for Intel i7 Core memory controllers - "
@@ -1,14 +1,11 @@
-/* Intel Sandy Bridge -EN/-EP/-EX Memory Controller kernel module
- *
- * This driver supports the memory controllers found on the Intel
- * processor family Sandy Bridge.
- *
- * This file may be distributed under the terms of the
- * GNU General Public License version 2 only.
- *
- * Copyright (c) 2011 by:
- * Mauro Carvalho Chehab
- */
+// SPDX-License-Identifier: GPL-2.0
+// Intel Sandy Bridge -EN/-EP/-EX Memory Controller kernel module
+//
+// This driver supports the memory controllers found on the Intel
+// processor family Sandy Bridge.
+//
+// Copyright (c) 2011 by:
+// Mauro Carvalho Chehab
#include <linux/module.h>
#include <linux/init.h>
@@ -3450,7 +3447,7 @@ module_exit(sbridge_exit);
module_param(edac_op_state, int, 0444);
MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Mauro Carvalho Chehab");
MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com)");
MODULE_DESCRIPTION("MC Driver for Intel Sandy Bridge and Ivy Bridge memory controllers - "