[RFC,net-next,v2,0/7] net: dsa: mt7530: updates for phylink changes

Message

Russell King (Oracle) Feb. 23, 2022, 11:33 a.m. UTC

Hi,

This revised series is a partial conversion of the mt7530 DSA driver to
the modern phylink infrastructure. This driver has some exceptional
cases which prevent - at the moment - its full conversion (particularly
with the Autoneg bit) to using phylink_generic_validate().

Patch 1 fixes the incorrect test highlighted in the first RFC series.

Patch 2 fixes the incorrect assumption that RGMII is unable to support
1000BASE-X.

Patch 3 populates the supported_interfaces for each port

Patch 4 removes the interface checks that become unnecessary as a result
of patch 3.

Patch 5 removes use of phylink_helper_basex_speed() which is no longer
required by phylink.

Patch 6 becomes possible after patch 5, only indicating the ethtool
modes that can be supported with a particular interface mode - this
involves removing some modes and adding others as per phylink
documentation.

Patch 7 switches the driver to use phylink_get_linkmodes(), which moves
the driver as close as we can to phylink_generic_validate() due to the
Autoneg bit issue mentioned above.

Patch 8 converts the driver to the phylink pcs support, removing a bunch
of driver private indirected methods. We include TRGMII as a PCS even
though strictly TRGMII does not have a PCS. This is convenient to allow
the change in patch 9 to be made.

Patch 9 moves the special autoneg handling to the PCS validate method,
which means we can convert the MAC side to the generic validator.

Patch 10 marks the driver as non-legacy.

Please review and test, thanks.

 drivers/net/dsa/mt7530.c | 330 +++++++++++++++++++++--------------------------
 drivers/net/dsa/mt7530.h |  26 ++--
 2 files changed, 159 insertions(+), 197 deletions(-)

Comments

Russell King (Oracle) March 3, 2022, 9:21 a.m. UTC | #1

On Wed, Feb 23, 2022 at 11:33:56AM +0000, Russell King (Oracle) wrote:
> Hi,
> 
> This revised series is a partial conversion of the mt7530 DSA driver to
> the modern phylink infrastructure. This driver has some exceptional
> cases which prevent - at the moment - its full conversion (particularly
> with the Autoneg bit) to using phylink_generic_validate().
> 
> Patch 1 fixes the incorrect test highlighted in the first RFC series.
> 
> Patch 2 fixes the incorrect assumption that RGMII is unable to support
> 1000BASE-X.
> 
> Patch 3 populates the supported_interfaces for each port
> 
> Patch 4 removes the interface checks that become unnecessary as a result
> of patch 3.
> 
> Patch 5 removes use of phylink_helper_basex_speed() which is no longer
> required by phylink.
> 
> Patch 6 becomes possible after patch 5, only indicating the ethtool
> modes that can be supported with a particular interface mode - this
> involves removing some modes and adding others as per phylink
> documentation.
> 
> Patch 7 switches the driver to use phylink_get_linkmodes(), which moves
> the driver as close as we can to phylink_generic_validate() due to the
> Autoneg bit issue mentioned above.
> 
> Patch 8 converts the driver to the phylink pcs support, removing a bunch
> of driver private indirected methods. We include TRGMII as a PCS even
> though strictly TRGMII does not have a PCS. This is convenient to allow
> the change in patch 9 to be made.
> 
> Patch 9 moves the special autoneg handling to the PCS validate method,
> which means we can convert the MAC side to the generic validator.
> 
> Patch 10 marks the driver as non-legacy.
> 
> Please review and test, thanks.
> 
>  drivers/net/dsa/mt7530.c | 330 +++++++++++++++++++++--------------------------
>  drivers/net/dsa/mt7530.h |  26 ++--
>  2 files changed, 159 insertions(+), 197 deletions(-)

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