From patchwork Mon Jun 1 13:08:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?RWRkaWUgSHVhbmcgKOm7g+aZuuWCkSk=?= X-Patchwork-Id: 6521951 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 45AD3C0020 for ; Mon, 1 Jun 2015 13:09:10 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3E0FC2054E for ; Mon, 1 Jun 2015 13:09:09 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4A793204EC for ; Mon, 1 Jun 2015 13:09:08 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1YzPSl-0002vm-T6; Mon, 01 Jun 2015 13:09:07 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1YzPSe-0002lr-Jt; Mon, 01 Jun 2015 13:09:01 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1440343338; Mon, 01 Jun 2015 21:08:34 +0800 Received: from mtkslt208.mediatek.inc (10.21.15.95) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Mon, 1 Jun 2015 21:08:33 +0800 From: Eddie Huang To: Matthias Brugger Subject: [PATCH v2 2/2] arm64: dts: mt8173: Add I2C device node Date: Mon, 1 Jun 2015 21:08:27 +0800 Message-ID: <1433164107-26568-3-git-send-email-eddie.huang@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1433164107-26568-1-git-send-email-eddie.huang@mediatek.com> References: <1433164107-26568-1-git-send-email-eddie.huang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150601_060901_096688_CF1AEFC3 X-CRM114-Status: UNSURE ( 6.10 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.3 (+) Cc: devicetree@vger.kernel.org, Sascha Hauer , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Eddie Huang , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add MT8173 I2C device nodes, include I2C controllers and pins. MT8173 has six I2C controllers, from i2c0 to i2c6, exclude i2c5. The 6th I2C controller register base doesn't next to 5th I2C, and there is a hardware between 5th and 6th I2C controller. So SoC designer name 6th controller as "i2c6", not "i2c5". Signed-off-by: Eddie Huang --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 119 +++++++++++++++++++++++++++++++ 1 file changed, 119 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index b52ec43..7003ed2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -158,6 +158,53 @@ interrupts = , , ; + i2c0_pins_a: i2c0@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c1_pins_a: i2c1@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c2_pins_a: i2c2@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c3_pins_a: i2c3@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c4_pins_a: i2c4@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; + + i2c6_pins_a: i2c6@0 { + pins1 { + pinmux = , + ; + bias-disable; + }; + }; }; watchdog: watchdog@10007000 { @@ -229,6 +276,78 @@ clocks = <&uart_clk>; status = "disabled"; }; + + i2c0: i2c@11007000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11007000 0 0x70>, + <0 0x11000100 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C0>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; + + i2c1: i2c@11008000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11008000 0 0x70>, + <0 0x11000180 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C1>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; + + i2c2: i2c@11009000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11009000 0 0x70>, + <0 0x11000200 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C2>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; + + i2c3: i2c3@11010000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11010000 0 0x70>, + <0 0x11000280 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C3>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; + + i2c4: i2c4@11011000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11011000 0 0x70>, + <0 0x11000300 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C4>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; + + i2c6: i2c6@11013000 { + compatible = "mediatek,mt8173-i2c"; + reg = <0 0x11013000 0 0x70>, + <0 0x11000080 0 0x80>; + interrupts = ; + clock-div = <16>; + clocks = <&pericfg CLK_PERI_I2C6>, + <&pericfg CLK_PERI_AP_DMA>; + clock-names = "main", "dma"; + status = "disabled"; + }; }; };