From patchwork Wed Jun 10 02:24:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chaotian Jing X-Patchwork-Id: 6576161 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id E717FC0020 for ; Wed, 10 Jun 2015 02:26:32 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id D9DD92055A for ; Wed, 10 Jun 2015 02:26:31 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D8CEE20555 for ; Wed, 10 Jun 2015 02:26:30 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2Vio-0002o5-4M; Wed, 10 Jun 2015 02:26:30 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z2ViJ-0002Tx-Jz; Wed, 10 Jun 2015 02:26:01 +0000 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1955046972; Wed, 10 Jun 2015 10:25:33 +0800 Received: from mhfsdcap03.mhfswrd (10.17.3.153) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Wed, 10 Jun 2015 10:25:26 +0800 From: Chaotian Jing To: Rob Herring , Matthias Brugger , Chris Ball , Ulf Hansson Subject: [PATCH v5 5/7] ARM: mediatek: dts: Add emmc support to mt8135 Date: Wed, 10 Jun 2015 10:24:46 +0800 Message-ID: <1433903088-14407-6-git-send-email-chaotian.jing@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1433903088-14407-1-git-send-email-chaotian.jing@mediatek.com> References: <1433903088-14407-1-git-send-email-chaotian.jing@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150609_192600_118669_8F4825CC X-CRM114-Status: UNSURE ( 5.43 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.3 (+) Cc: Mark Rutland , James Liao , srv_heupstream@mediatek.com, Arnd Bergmann , devicetree@vger.kernel.org, Hongzhou Yang , Catalin Marinas , bin.zhang@mediatek.com, linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Will Deacon , linux-gpio@vger.kernel.org, linux-mediatek@lists.infradead.org, Chaotian Jing , Sascha Hauer , "Joe.C" , Eddie Huang , linux-arm-kernel@lists.infradead.org X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yingjoe Chen Add emmc node for mt8135.dtsi & mt8135-evbp1.dts Signed-off-by: Yingjoe Chen Signed-off-by: Chaotian Jing --- arch/arm/boot/dts/mt8135-evbp1.dts | 158 +++++++++++++++++++++++++++++++++++++ arch/arm/boot/dts/mt8135.dtsi | 55 +++++++++++++ 2 files changed, 213 insertions(+) diff --git a/arch/arm/boot/dts/mt8135-evbp1.dts b/arch/arm/boot/dts/mt8135-evbp1.dts index 357a91f..043d997 100644 --- a/arch/arm/boot/dts/mt8135-evbp1.dts +++ b/arch/arm/boot/dts/mt8135-evbp1.dts @@ -24,6 +24,164 @@ }; }; +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_pins_default>; + pinctrl-1 = <&mmc0_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + vmmc-supply = <&mt6397_vemc_3v3_reg>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_pins_default>; + pinctrl-1 = <&mmc1_pins_uhs>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + vmmc-supply = <&mt6397_vmch_reg>; + vqmmc-supply = <&mt6397_vmc_reg>; + cd-gpios = <&pio 63 0>; + cap-sd-highspeed; + sd-uhs-sdr25; +}; + +&pio { + mmc0_pins_default: mmc0default { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + bias-pull-up; + }; + + pins_clk { + pinmux = ; + bias-pull-down; + }; + + pins_rst { + pinmux = ; + bias-pull-up; + }; + }; + + mmc1_pins_default: mmc1default { + pins_cmd_dat { + pinmux = , + , + , + , + ; + bias-pull-up; + }; + + pins_clk { + pinmux = ; + bias-pull-down; + }; + + pins_insi { + pinmux = ; + bias-pull-up; + }; + }; + + mmc2_pins_default: mmc2default { + pins_cmd_dat { + pinmux = , + , + , + , + ; + bias-pull-up; + }; + + pins_clk { + pinmux = ; + bias-pull-down; + }; + + pins_insi { + pinmux = ; + bias-pull-up; + }; + }; + + mmc0_pins_uhs: mmc0@0 { + pins_cmd_dat { + pinmux = , + , + , + , + , + , + , + , + ; + drive-strength = ; + bias-pull-up = ; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins_rst { + pinmux = ; + bias-pull-up; + }; + }; + + mmc1_pins_uhs: mmc1@0 { + pins_cmd_dat { + pinmux = , + , + , + , + ; + drive-strength = ; + bias-pull-up; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + bias-pull-down; + }; + }; + + mmc2_pins_uhs: mmc2@0 { + pins_cmd_dat { + pinmux = , + , + , + , + ; + drive-strength = ; + bias-pull-up = ; + }; + + pins_clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + }; +}; + &pwrap { pmic: mt6397 { compatible = "mediatek,mt6397"; diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index fec0ac5..9cc42f0 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -78,6 +78,12 @@ compatible = "simple-bus"; ranges; + clk_null: clk_null { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + system_clk: dummy13m { compatible = "fixed-clock"; clock-frequency = <13000000>; @@ -241,5 +247,54 @@ status = "disabled"; }; + mmc0: mmc@11230000 { + compatible = "mediatek,mt8135-mmc"; + reg = <0 0x11230000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC20_1>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc1: mmc@11240000 { + compatible = "mediatek,mt8135-mmc"; + reg = <0 0x11240000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC20_2>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc2: mmc@11250000 { + compatible = "mediatek,mt8135-mmc"; + reg = <0 0x11250000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC30_1>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc3: mmc@11260000 { + compatible = "mediatek,mt8135-mmc"; + reg = <0 0x11260000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC30_2>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; + + mmc4: mmc@11270000 { + compatible = "mediatek,mt8135-mmc"; + reg = <0 0x11270000 0 0x1000>; + interrupts = ; + clocks = <&pericfg CLK_PERI_MSDC30_3>, + <&clk_null>; + clock-names = "source", "hclk"; + status = "disabled"; + }; }; };