From patchwork Thu Jun 18 02:46:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Shu X-Patchwork-Id: 6632581 Return-Path: X-Original-To: patchwork-linux-mediatek@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 194109F3A0 for ; Thu, 18 Jun 2015 02:47:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 366DC207C5 for ; Thu, 18 Jun 2015 02:47:17 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 270A4206EA for ; Thu, 18 Jun 2015 02:47:16 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5PrH-0007dc-BM; Thu, 18 Jun 2015 02:47:15 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1Z5PrF-0007ad-9p for linux-mediatek@lists.infradead.org; Thu, 18 Jun 2015 02:47:14 +0000 X-Listener-Flag: 11101 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1385992812; Thu, 18 Jun 2015 10:46:49 +0800 Received: from mtkslt201.mediatek.inc (10.21.15.54) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Thu, 18 Jun 2015 10:46:48 +0800 From: Scott Shu To: Subject: [PATCH 6/6] ARM: dts: mt6580: enable basic SMP bringup for mt6580 Date: Thu, 18 Jun 2015 10:46:27 +0800 Message-ID: <1434595587-25466-7-git-send-email-scott.shu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1434595587-25466-1-git-send-email-scott.shu@mediatek.com> References: <1434595587-25466-1-git-send-email-scott.shu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20150617_194713_568134_071D2697 X-CRM114-Status: UNSURE ( 4.51 ) X-CRM114-Notice: Please train this message. X-Spam-Score: 1.3 (+) Cc: scott.shu@gmail.com, linux-mediatek@lists.infradead.org, jades.shih@mediatek.com, srv_wsdupstream@mediatek.com, Miles.Chen@mediatek.com, Mars.Cheng@mediatek.com, MY.Chuang@mediatek.com, Scott Shu X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add arch timer node to enable arch-timer support. MT6580 firmware doesn't correctly setup arch-timer frequency and CNTVOFF, add properties to workaround this. This set cpu enable-method to enable SMP. --- arch/arm/boot/dts/mt6580.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/mt6580.dtsi b/arch/arm/boot/dts/mt6580.dtsi index a974830..a7071b38 100644 --- a/arch/arm/boot/dts/mt6580.dtsi +++ b/arch/arm/boot/dts/mt6580.dtsi @@ -23,26 +23,31 @@ cpus { #address-cells = <1>; #size-cells = <0>; + enable-method = "mediatek,mt6580-smp"; cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x0>; + clock-frequency = <1700000000>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x1>; + clock-frequency = <1700000000>; }; cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x2>; + clock-frequency = <1700000000>; }; cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x3>; + clock-frequency = <1700000000>; }; }; @@ -72,6 +77,21 @@ }; }; + timer { + compatible = "arm,armv7-timer"; + interrupt-parent = <&gic>; + interrupts = , + , + , + ; + clock-frequency = <13000000>; + arm,cpu-registers-not-fw-configured; + }; + soc { #address-cells = <1>; #size-cells = <1>;