From patchwork Wed Jul 20 04:03:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bibby Hsieh X-Patchwork-Id: 9238755 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5A325600CB for ; Wed, 20 Jul 2016 04:04:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4EC042026B for ; Wed, 20 Jul 2016 04:04:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4069E26C2F; Wed, 20 Jul 2016 04:04:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F11DC2026B for ; Wed, 20 Jul 2016 04:04:12 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bPik0-0003cA-Fu; Wed, 20 Jul 2016 04:04:12 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bPijo-0003Vf-RN; Wed, 20 Jul 2016 04:04:02 +0000 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 265901771; Wed, 20 Jul 2016 12:03:35 +0800 Received: from localhost.localdomain (10.21.14.115) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Wed, 20 Jul 2016 12:03:10 +0800 From: Bibby Hsieh To: David Airlie , Matthias Brugger , Daniel Vetter , , Subject: [PATCH 4/4] drm/mediatek: adjust VENCPLL clock for 4K HDMI output Date: Wed, 20 Jul 2016 12:03:05 +0800 Message-ID: <1468987385-37353-5-git-send-email-bibby.hsieh@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1468987385-37353-1-git-send-email-bibby.hsieh@mediatek.com> References: <1468987385-37353-1-git-send-email-bibby.hsieh@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160719_210401_079155_B743C073 X-CRM114-Status: GOOD ( 13.16 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Bibby Hsieh , linux-kernel@vger.kernel.org, Cawa Cheng , Mao Huang , CK Hu , Thierry Reding , Philipp Zabel , YT Shen , Yingjoe Chen , Sascha Hauer , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP if MT8173 display module can support 4K HDMI output, we have to adjust VENCPLL clock from default 660MHz to 800MHz. Signed-off-by: Bibby Hsieh --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 9 +++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.h | 1 + 2 files changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c index b1223d5..f159189 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c @@ -23,6 +23,7 @@ #include #include #include +#include #include "mtk_drm_crtc.h" #include "mtk_drm_ddp.h" @@ -363,6 +364,14 @@ static int mtk_drm_probe(struct platform_device *pdev) return ret; } + private->vencpll_clk = devm_clk_get(dev, "vencpll"); + if (IS_ERR(private->vencpll_clk)) { + ret = PTR_ERR(private->vencpll_clk); + dev_err(dev, "Failed to get vencpll clock: %d\n", ret); + return ret; + } + clk_set_rate(private->vencpll_clk, 800000000); + /* Iterate over sibling DISP function blocks */ for_each_child_of_node(dev->of_node->parent, node) { const struct of_device_id *of_id; diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.h b/drivers/gpu/drm/mediatek/mtk_drm_drv.h index aa93894..273ad02 100644 --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.h +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.h @@ -40,6 +40,7 @@ struct mtk_drm_private { void __iomem *config_regs; struct device_node *comp_node[DDP_COMPONENT_ID_MAX]; struct mtk_ddp_comp *ddp_comp[DDP_COMPONENT_ID_MAX]; + struct clk *vencpll_clk; struct { struct drm_atomic_state *state;