From patchwork Tue Aug 16 07:30:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Erin Lo X-Patchwork-Id: 9282801 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7072A60839 for ; Tue, 16 Aug 2016 07:33:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 62CA32888E for ; Tue, 16 Aug 2016 07:33:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5752D288C6; Tue, 16 Aug 2016 07:33:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id DD91A2888E for ; Tue, 16 Aug 2016 07:33:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bZYsj-00036M-2q; Tue, 16 Aug 2016 07:33:53 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bZYs5-0002LH-9Y; Tue, 16 Aug 2016 07:33:49 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2084753744; Tue, 16 Aug 2016 15:32:52 +0800 Received: from mtkslt209.mediatek.inc (10.21.15.96) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Tue, 16 Aug 2016 15:32:50 +0800 From: Erin Lo To: Matthias Brugger , Mike Turquette , Stephen Boyd , Rob Herring Subject: [PATCH v10 8/9] arm: dts: mt2701: Add clock controller device nodes Date: Tue, 16 Aug 2016 15:30:28 +0800 Message-ID: <1471332629-15722-9-git-send-email-erin.lo@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471332629-15722-1-git-send-email-erin.lo@mediatek.com> References: <1471332629-15722-1-git-send-email-erin.lo@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160816_003313_792512_40D81D0E X-CRM114-Status: GOOD ( 10.72 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Sascha Hauer , Arnd Bergmann , James Liao , Erin Lo , linux-kernel@vger.kernel.org, srv_heupstream@mediatek.com, linux-mediatek@lists.infradead.org, Philipp Zabel , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: James Liao Add clock controller nodes for MT2701, include topckgen, infracfg, pericfg, apmixedsys, mmsys, imgsys, vdecsys, hifsys, ethsys and bdpsys. This patch also add two oscillators that provide clocks for MT2701. Signed-off-by: James Liao Signed-off-by: Erin Lo --- arch/arm/boot/dts/mt2701.dtsi | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 18596a2..c9a8dbf 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -12,8 +12,10 @@ * GNU General Public License for more details. */ +#include #include #include +#include #include "skeleton64.dtsi" #include "mt2701-pinfunc.h" @@ -77,6 +79,20 @@ #clock-cells = <0>; }; + clk26m: oscillator@0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; + }; + + rtc32k: oscillator@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32000>; + clock-output-names = "rtc32k"; + }; + timer { compatible = "arm,armv7-timer"; interrupt-parent = <&gic>; @@ -104,6 +120,26 @@ reg = <0 0x10005000 0 0x1000>; }; + topckgen: syscon@10000000 { + compatible = "mediatek,mt2701-topckgen", "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: syscon@10001000 { + compatible = "mediatek,mt2701-infracfg", "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pericfg: syscon@10003000 { + compatible = "mediatek,mt2701-pericfg", "syscon"; + reg = <0 0x10003000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt2701-wdt", "mediatek,mt6589-wdt"; @@ -128,6 +164,12 @@ reg = <0 0x10200100 0 0x1c>; }; + apmixedsys: syscon@10209000 { + compatible = "mediatek,mt2701-apmixedsys", "syscon"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller;