From patchwork Thu Aug 25 10:44:57 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 9299165 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A431D60459 for ; Thu, 25 Aug 2016 10:45:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 95CB7291F7 for ; Thu, 25 Aug 2016 10:45:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8AC4F29252; Thu, 25 Aug 2016 10:45:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 49242291F7 for ; Thu, 25 Aug 2016 10:45:45 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcsAK-0008IV-G1; Thu, 25 Aug 2016 10:45:44 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1bcsA7-0007RV-LS for linux-mediatek@lists.infradead.org; Thu, 25 Aug 2016 10:45:34 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 879710778; Thu, 25 Aug 2016 18:45:10 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Thu, 25 Aug 2016 18:45:09 +0800 From: Sean Wang To: , Subject: [RESEND PATCH net 06/10] net: ethernet: mediatek: fix the loss of pin-mux setting for GMAC2 Date: Thu, 25 Aug 2016 18:44:57 +0800 Message-ID: <1472121901-15629-7-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1472121901-15629-1-git-send-email-sean.wang@mediatek.com> References: <1472121901-15629-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160825_034531_973291_A4858665 X-CRM114-Status: GOOD ( 12.16 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: netdev@vger.kernel.org, nbd@openwrt.org, Sean Wang , linux-mediatek@lists.infradead.org, keyhaede@gmail.com Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP ommited the setting about pin-mux which results in incorrect signals being routed on GMAC2. Signed-off-by: Sean Wang --- drivers/net/ethernet/mediatek/mtk_eth_soc.c | 14 ++++++++++++++ drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 +++ 2 files changed, 17 insertions(+) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index 5bd31f8..0a4c782 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -1415,6 +1415,7 @@ static int __init mtk_hw_init(struct mtk_eth *eth) usleep_range(10, 20); reset_control_deassert(eth->rstc); usleep_range(10, 20); + pinctrl_select_state(eth->pins, eth->ephy_default); /* Set GE2 driving and slew rate */ regmap_write(eth->pctl, GPIO_DRV_SEL10, 0xa00); @@ -1858,6 +1859,19 @@ static int mtk_probe(struct platform_device *pdev) return -ENODEV; } + eth->pins = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(eth->pins)) { + dev_err(&pdev->dev, "cannot get pinctrl\n"); + return PTR_ERR(eth->pins); + } + + eth->ephy_default = + pinctrl_lookup_state(eth->pins, "default"); + if (IS_ERR(eth->ephy_default)) { + dev_err(&pdev->dev, "cannot get pinctrl state\n"); + return PTR_ERR(eth->ephy_default); + } + clk_prepare_enable(eth->clk_ethif); clk_prepare_enable(eth->clk_esw); clk_prepare_enable(eth->clk_gp1); diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index f82e3ac..13d3f1b 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -404,6 +404,9 @@ struct mtk_eth { struct clk *clk_esw; struct clk *clk_gp1; struct clk *clk_gp2; + struct pinctrl *pins; + struct pinctrl_state *ephy_default; + struct mii_bus *mii_bus; struct work_struct pending_work; };