From patchwork Tue Nov 8 06:09:00 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yong Mao X-Patchwork-Id: 9416655 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2311760459 for ; Tue, 8 Nov 2016 06:10:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1408C28AD9 for ; Tue, 8 Nov 2016 06:10:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 08D2928AE4; Tue, 8 Nov 2016 06:10:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C4B5128AD9 for ; Tue, 8 Nov 2016 06:10:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c3zcK-0004cB-93; Tue, 08 Nov 2016 06:10:44 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1c3zbc-0003At-1p; Tue, 08 Nov 2016 06:10:01 +0000 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 654694451; Tue, 08 Nov 2016 14:09:38 +0800 Received: from mhfsdcap03.localdomain (10.17.3.153) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Tue, 8 Nov 2016 14:09:37 +0800 From: Yong Mao To: Ulf Hansson Subject: [PATCH 3/4] sdio: mediatek: support sdr104_clk_delay in sdio Date: Tue, 8 Nov 2016 14:09:00 +0800 Message-ID: <1478585341-6749-4-git-send-email-yong.mao@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1478585341-6749-1-git-send-email-yong.mao@mediatek.com> References: <1478585341-6749-1-git-send-email-yong.mao@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20161107_221000_325359_6B822FD6 X-CRM114-Status: GOOD ( 13.93 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, YH Huang , Nicolas Boichat , Mathias Nyman , srv_heupstream@mediatek.com, Catalin Marinas , linux-mediatek@lists.infradead.org, Will Deacon , Douglas Anderson , yong mao , linux-kernel@vger.kernel.org, Chunfeng Yun , Rob Herring , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, Philipp Zabel , Matthias Brugger , linux-mmc@vger.kernel.org, Eddie Huang , Chaotian Jing Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: yong mao In order to let sdio run stable with 200M clock, we should setup the value of clock delay. Signed-off-by: Yong Mao Signed-off-by: Chaotian Jing --- drivers/mmc/host/mtk-sd.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/mtk-sd.c b/drivers/mmc/host/mtk-sd.c index 37edf30..fba28f2 100644 --- a/drivers/mmc/host/mtk-sd.c +++ b/drivers/mmc/host/mtk-sd.c @@ -213,6 +213,7 @@ #define MSDC_PAD_TUNE_DATRRDLY (0x1f << 8) /* RW */ #define MSDC_PAD_TUNE_CMDRDLY (0x1f << 16) /* RW */ +#define MSDC_PAD_TUNE_CLKTDLY (0x1f << 27) /* RW */ #define PAD_DS_TUNE_DLY1 (0x1f << 2) /* RW */ #define PAD_DS_TUNE_DLY2 (0x1f << 7) /* RW */ @@ -335,6 +336,7 @@ struct msdc_host { unsigned char timing; bool vqmmc_enabled; u32 hs400_ds_delay; + u32 sdr104_clk_delay; bool hs400_mode; /* current eMMC will run at hs400 mode */ struct msdc_save_para save_para; /* used when gate HCLK */ struct msdc_tune_para def_tune_para; /* default tune setting */ @@ -1230,7 +1232,8 @@ static void msdc_init_hw(struct msdc_host *host) writel(val, host->base + MSDC_INT); spin_unlock_irqrestore(&host->irqlock, flags); - writel(0, host->base + MSDC_PAD_TUNE); + sdr_set_field(host->base + MSDC_PAD_TUNE, + MSDC_PAD_TUNE_CLKTDLY, host->sdr104_clk_delay); writel(0, host->base + MSDC_IOCON); sdr_set_field(host->base + MSDC_IOCON, MSDC_IOCON_DDLSEL, 0); writel(0x403c0046, host->base + MSDC_PATCH_BIT); @@ -1671,6 +1674,11 @@ static int msdc_drv_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "hs400-ds-delay: %x\n", host->hs400_ds_delay); + if (!of_property_read_u32(pdev->dev.of_node, "sdr104-clk-delay", + &host->sdr104_clk_delay)) + dev_dbg(&pdev->dev, "sdr104-clk-delay: %x\n", + host->sdr104_clk_delay); + host->dev = &pdev->dev; host->mmc = mmc; host->src_clk_freq = clk_get_rate(host->src_clk);