From patchwork Tue Jan 17 12:55:01 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yong Mao X-Patchwork-Id: 9520817 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D93946020A for ; Tue, 17 Jan 2017 12:55:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D76E82853E for ; Tue, 17 Jan 2017 12:55:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C768B2854A; Tue, 17 Jan 2017 12:55:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9C5E02853E for ; Tue, 17 Jan 2017 12:55:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1cTTIb-0003b7-6d; Tue, 17 Jan 2017 12:55:41 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1cTTIX-0003U0-NM for linux-mediatek@lists.infradead.org; Tue, 17 Jan 2017 12:55:39 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1682441781; Tue, 17 Jan 2017 20:55:08 +0800 Received: from mhfsdcap03.mhfswrd (10.17.3.153) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Tue, 17 Jan 2017 20:55:05 +0800 From: Yong Mao To: Ulf Hansson Subject: [PATCH v2 1/3] mmc: dt-bindings: update Mediatek MMC bindings Date: Tue, 17 Jan 2017 20:55:01 +0800 Message-ID: <1484657703-5861-2-git-send-email-yong.mao@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1484657703-5861-1-git-send-email-yong.mao@mediatek.com> References: <1484657703-5861-1-git-send-email-yong.mao@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170117_045537_943000_3112E0AE X-CRM114-Status: UNSURE ( 8.44 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: srv_heupstream@mediatek.com, Linus Walleij , linux-mmc@vger.kernel.org, yong mao , linux-mediatek@lists.infradead.org, Chunfeng Yun , Eddie Huang , Chaotian Jing Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: yong mao Add description for hs200-cmd-int-delay Add description for hs400-cmd-int-delay Add description for cmd-resp-sel Signed-off-by: Yong Mao --- Documentation/devicetree/bindings/mmc/mtk-sd.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/mtk-sd.txt b/Documentation/devicetree/bindings/mmc/mtk-sd.txt index 0120c7f..2dbb3b0 100644 --- a/Documentation/devicetree/bindings/mmc/mtk-sd.txt +++ b/Documentation/devicetree/bindings/mmc/mtk-sd.txt @@ -21,6 +21,9 @@ Optional properties: - assigned-clocks: PLL of the source clock - assigned-clock-parents: parent of source clock, used for HS400 mode to get 400Mhz source clock - hs400-ds-delay: HS400 DS delay setting +- hs200-cmd-int-delay: HS200 command internal delay setting +- hs400-cmd-int-delay: HS400 command internal delay setting +- cmd-resp-sel: command response sample selection Examples: mmc0: mmc@11230000 { @@ -38,4 +41,7 @@ mmc0: mmc@11230000 { assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>; hs400-ds-delay = <0x14015>; + hs200-cmd-int-delay = <26>; + hs400-cmd-int-delay = <14>; + cmd-resp-sel = <0>; /* 0: rising, 1: falling */ };