From patchwork Wed Apr 26 09:25:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Wang X-Patchwork-Id: 9700881 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D78C2603F7 for ; Wed, 26 Apr 2017 09:51:29 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DE8CA2811E for ; Wed, 26 Apr 2017 09:51:29 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D2A3A2858D; Wed, 26 Apr 2017 09:51:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7B0B82857F for ; Wed, 26 Apr 2017 09:51:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uwFOZjTrTWEunOxqd5BgUqwc3WGty0R4mzjgSN3cyok=; b=YHazfwth01A/+F VraOaA67U/MVJuK2HhLk0q/Kt+/B5Pao+P8HH+KLSyjWG4zoU2qU8Zy/Oyf5R+CErG03yoXyhIc73 wo9SwAOZkAlSPzYG0ICWAMOrsYR3WaFV123E0f1azOO2QFEkiOPco78N7U3AA6HiSep1jzaC9YN3j WgZ9Z0Y+RTKGGafWsjWIkorQaaQs2R1txmHfQDlz+NPwP2lj3hSyK/EM33ku3sGjJLh/Ffi/s7wi8 jSFPduU12+wU2Q4ALcI5LoURL2Xm0O8pmLnS9agsKghdK1eLXJ6QqKBFE6nleXqf0NfUY6UpfyRF/ Fq3TQfHXvx3ScfXExezw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1d3JbU-0005ED-Vj; Wed, 26 Apr 2017 09:51:21 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1d3JEA-0001BT-0u; Wed, 26 Apr 2017 09:27:21 +0000 Received: from mtkhts07.mediatek.inc [(172.21.101.69)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 940453619; Wed, 26 Apr 2017 17:26:27 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkhts07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.266.1; Wed, 26 Apr 2017 17:26:26 +0800 From: To: , , , , , , , Subject: [PATCH v2 03/30] arm: dts: mt7623: add clock controller device nodes Date: Wed, 26 Apr 2017 17:25:47 +0800 Message-ID: <1493198774-4478-4-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1493198774-4478-1-git-send-email-sean.wang@mediatek.com> References: <1493198774-4478-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170426_022714_970336_08F5F61F X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-gpio@vger.kernel.org, Sean Wang , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: John Crispin Add clock controller nodes for MT7623, including topckgen, infracfg, pericfg and apmixedsys. This patch also cleans up two oscillators that provide clocks for MT7623. Switch the uart clocks to the real ones while at it. Signed-off-by: John Crispin Signed-off-by: Sean Wang --- arch/arm/boot/dts/mt7623.dtsi | 64 +++++++++++++++++++++++++++++++++++++------ 1 file changed, 55 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index 402579a..b97b2ba 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -14,6 +14,8 @@ #include #include +#include +#include #include "skeleton64.dtsi" / { @@ -53,16 +55,18 @@ #clock-cells = <0>; }; - rtc_clk: dummy32k { + rtc32k: oscillator@1 { compatible = "fixed-clock"; - clock-frequency = <32000>; #clock-cells = <0>; + clock-frequency = <32000>; + clock-output-names = "rtc32k"; }; - uart_clk: dummy26m { + clk26m: oscillator@0 { compatible = "fixed-clock"; - clock-frequency = <26000000>; #clock-cells = <0>; + clock-frequency = <26000000>; + clock-output-names = "clk26m"; }; timer { @@ -74,6 +78,32 @@ ; }; + topckgen: syscon@10000000 { + compatible = "mediatek,mt7623-topckgen", + "mediatek,mt2701-topckgen", + "syscon"; + reg = <0 0x10000000 0 0x1000>; + #clock-cells = <1>; + }; + + infracfg: syscon@10001000 { + compatible = "mediatek,mt7623-infracfg", + "mediatek,mt2701-infracfg", + "syscon"; + reg = <0 0x10001000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + pericfg: syscon@10003000 { + compatible = "mediatek,mt7623-pericfg", + "mediatek,mt2701-pericfg", + "syscon"; + reg = <0 0x10003000 0 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt7623-wdt", "mediatek,mt6589-wdt"; @@ -85,7 +115,7 @@ "mediatek,mt6577-timer"; reg = <0 0x10008000 0 0x80>; interrupts = ; - clocks = <&system_clk>, <&rtc_clk>; + clocks = <&system_clk>, <&rtc32k>; clock-names = "system-clk", "rtc-clk"; }; @@ -98,6 +128,14 @@ reg = <0 0x10200100 0 0x1c>; }; + apmixedsys: syscon@10209000 { + compatible = "mediatek,mt7623-apmixedsys", + "mediatek,mt2701-apmixedsys", + "syscon"; + reg = <0 0x10209000 0 0x1000>; + #clock-cells = <1>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a7-gic"; interrupt-controller; @@ -114,7 +152,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11002000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART0_SEL>, + <&pericfg CLK_PERI_UART0>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -123,7 +163,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11003000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART1_SEL>, + <&pericfg CLK_PERI_UART1>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -132,7 +174,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11004000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART2_SEL>, + <&pericfg CLK_PERI_UART2>; + clock-names = "baud", "bus"; status = "disabled"; }; @@ -141,7 +185,9 @@ "mediatek,mt6577-uart"; reg = <0 0x11005000 0 0x400>; interrupts = ; - clocks = <&uart_clk>; + clocks = <&pericfg CLK_PERI_UART3_SEL>, + <&pericfg CLK_PERI_UART3>; + clock-names = "baud", "bus"; status = "disabled"; }; };