From patchwork Wed Nov 29 09:24:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "RogerCC.Lin" X-Patchwork-Id: 10081689 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 41F7B60353 for ; Wed, 29 Nov 2017 09:31:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 39F0729739 for ; Wed, 29 Nov 2017 09:31:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2ED082975C; Wed, 29 Nov 2017 09:31:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D2FFD29739 for ; Wed, 29 Nov 2017 09:31:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9y6JQwyUsS0elN4Bm3DNEnECwNoBvmJuaXi/q20kgvo=; b=gEMZZuWFbiG3To nm3EGz6QBLJMWtmxicsDzDNYQeJPfoUaJFt+BKjWsuQRJDhMdUKB+fBdAjpEJ/KKN89DhnbxEARMM twKJRgejFLjeWO0zwUfkWwlM3Cfa5GgBHuacAd0SUcPa8q4zj84FzKb/k3V3cU/CII5QaR4JJQ1us VoauzP3uvz/07/CGj6vuN8gDxaa/M/DSoxBeVyV+pgsyKvArmmaYaZDL9/DGsWOHwwoXowZ8Wuhsf 93knEi4JWTj3DcuuzYuafVT7vJbdqbpoIdDhIueuQKN62xcrgH35nMjNXU9kadHaDpdbNrzDb2Xuf TrwzPo7DjqLv+rpqAQ4g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux)) id 1eJyiF-0004fk-6v; Wed, 29 Nov 2017 09:31:27 +0000 Received: from [210.61.82.184] (helo=mailgw02.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.87 #1 (Red Hat Linux)) id 1eJyhc-00042G-TB; Wed, 29 Nov 2017 09:30:56 +0000 X-UUID: 6bee0a52f80e4cee8f0ef4c8b2c914a5-20171129 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 2037040695; Wed, 29 Nov 2017 17:24:54 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Wed, 29 Nov 2017 17:24:53 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Wed, 29 Nov 2017 17:24:53 +0800 From: RogerCC Lin To: , Subject: [PATCH 3/3] mtd: nand: mtk: Support MT7622 NAND flash controller. Date: Wed, 29 Nov 2017 17:24:46 +0800 Message-ID: <1511947486-7707-4-git-send-email-rogercc.lin@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1511947486-7707-1-git-send-email-rogercc.lin@mediatek.com> References: <1511947486-7707-1-git-send-email-rogercc.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171129_013049_081313_C390FC70 X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: srv_heupstream@mediatek.com, bayi.cheng@mediatek.com, linux-mtd@lists.infradead.org, linux-mediatek@lists.infradead.org, xiaolei.li@mediatek.com, dwmw2@infradead.org, rogercc.lin@mediatek.com Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: RogerCC Lin Add tables to support MT&622 NAND flash controller. Signed-off-by: RogerCC Lin --- drivers/mtd/nand/mtk_ecc.c | 26 ++++++++++++++++++++++++++ drivers/mtd/nand/mtk_nand.c | 16 ++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/drivers/mtd/nand/mtk_ecc.c b/drivers/mtd/nand/mtk_ecc.c index fa1843e..136f6ec 100644 --- a/drivers/mtd/nand/mtk_ecc.c +++ b/drivers/mtd/nand/mtk_ecc.c @@ -60,6 +60,10 @@ 40, 44, 48, 52, 56, 60, 68, 72, 80 }; +static const u8 ecc_strength_mt7622[] = { + 4, 6, 8, 10, 12, 14, 16 +}; + enum mtk_ecc_regs { ECC_ENCPAR00, ECC_ENCIRQ_EN, @@ -87,6 +91,15 @@ enum mtk_ecc_regs { [ECC_DECIRQ_STA] = 0x204, }; +static int mt7622_ecc_regs[] = { + [ECC_ENCPAR00] = 0x10, + [ECC_ENCIRQ_EN] = 0x30, + [ECC_ENCIRQ_STA] = 0x34, + [ECC_DECDONE] = 0x11c, + [ECC_DECIRQ_EN] = 0x140, + [ECC_DECIRQ_STA] = 0x144, +}; + static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc, enum mtk_ecc_operation op) { @@ -429,6 +442,16 @@ void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p) .pg_irq_sel = 1, }; +static const struct mtk_ecc_caps mtk_ecc_caps_mt7622 = { + .err_mask = 0x3f, + .ecc_strength = ecc_strength_mt7622, + .ecc_regs = mt7622_ecc_regs, + .num_ecc_strength = 7, + .ecc_mode_shift = 4, + .parity_bits = 13, + .pg_irq_sel = 0, +}; + static const struct of_device_id mtk_ecc_dt_match[] = { { .compatible = "mediatek,mt2701-ecc", @@ -436,6 +459,9 @@ void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p) }, { .compatible = "mediatek,mt2712-ecc", .data = &mtk_ecc_caps_mt2712, + }, { + .compatible = "mediatek,mt7622-ecc", + .data = &mtk_ecc_caps_mt7622, }, {}, }; diff --git a/drivers/mtd/nand/mtk_nand.c b/drivers/mtd/nand/mtk_nand.c index 641c2be..3e878ee 100644 --- a/drivers/mtd/nand/mtk_nand.c +++ b/drivers/mtd/nand/mtk_nand.c @@ -174,6 +174,10 @@ struct mtk_nfc { 74 }; +static const u8 spare_size_mt7622[] = { + 16, 26, 27, 28 +}; + static inline struct mtk_nfc_nand_chip *to_mtk_nand(struct nand_chip *nand) { return container_of(nand, struct mtk_nfc_nand_chip, nand); @@ -1409,6 +1413,15 @@ static int mtk_nfc_nand_chips_init(struct device *dev, struct mtk_nfc *nfc) .max_sector_size = 1024, }; +static const struct mtk_nfc_caps mtk_nfc_caps_mt7622 = { + .spare_size = spare_size_mt7622, + .num_spare_size = 4, + .pageformat_spare_shift = 4, + .nfi_clk_div = 1, + .max_sector = 8, + .max_sector_size = 512, +}; + static const struct of_device_id mtk_nfc_id_table[] = { { .compatible = "mediatek,mt2701-nfc", @@ -1416,6 +1429,9 @@ static int mtk_nfc_nand_chips_init(struct device *dev, struct mtk_nfc *nfc) }, { .compatible = "mediatek,mt2712-nfc", .data = &mtk_nfc_caps_mt2712, + }, { + .compatible = "mediatek,mt7622-nfc", + .data = &mtk_nfc_caps_mt7622, }, {} };