From patchwork Tue Jul 17 08:52:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mars Cheng X-Patchwork-Id: 10528483 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3C84860247 for ; Tue, 17 Jul 2018 08:53:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1A20F28C85 for ; Tue, 17 Jul 2018 08:53:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0DB3628CA8; Tue, 17 Jul 2018 08:53:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, MAILING_LIST_MULTI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 9997528C85 for ; Tue, 17 Jul 2018 08:53:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ZaOx5BE8rBsYu7bTFUCnYJv2GejZajkxQUuZA9t0ujs=; b=PHRBZ9wkHCTEbw p/RvnVd9whgmgdebp1KZbMju0zm98BI/M/yLul3RBO60H/k6e0nz2/hGJu71elA8ppAyShnhPcGaV 80Zxc7/pEpNLU+4ZQU1Mws32qV+CsHnmZ+mU7hu3Cmto82DRscNF6PnEiLldq3LCZ6NHqc07j5bLa uvIWuwiozUfjFcFjhWvEDGURCDY3ogJLPLTBkYriwMVF080ZHekVPXP2VO6NkgdZRja0vl98oftkT bCNHU6m/vfocRBn4Y6PaemqOOgJA24i5TtLQw1T2o7rA1ZjtHaWmR98ejpB6r8En5fTLY1vIv/57N 2PrwHT18jMn4ZtmhPh1w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ffLjt-0001ad-3q for patchwork-linux-mediatek@patchwork.kernel.org; Tue, 17 Jul 2018 08:53:45 +0000 Received: from [210.61.82.183] (helo=mailgw01.mediatek.com) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1ffLj6-0000TH-Cf; Tue, 17 Jul 2018 08:52:58 +0000 X-UUID: 49e045650648474d9ea53ea30ec216b5-20180717 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1055421502; Tue, 17 Jul 2018 16:52:37 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 17 Jul 2018 16:52:35 +0800 Received: from mtkswgap22.mediatek.inc (172.21.77.33) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 17 Jul 2018 16:52:35 +0800 From: Mars Cheng To: Matthias Brugger , Rob Herring , Marc Zyngier , Ryder Lee , Stephen Boyd , Sean Wang Subject: [PATCH v5 07/11] soc: mediatek: add MT6765 subdomain support Date: Tue, 17 Jul 2018 16:52:28 +0800 Message-ID: <1531817552-17221-8-git-send-email-mars.cheng@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1531817552-17221-1-git-send-email-mars.cheng@mediatek.com> References: <1531817552-17221-1-git-send-email-mars.cheng@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180717_015256_700074_D4402971 X-CRM114-Status: GOOD ( 11.96 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, CC Hwang , wsd_upstream@mediatek.com, Loda Chou , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-serial@vger.kernel.org, Mars Cheng , Owen Chen , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP add extend data, parent_n for domain-subdomain corresponse. Signed-off-by: Mars Cheng Signed-off-by: Owen Chen --- drivers/soc/mediatek/mtk-scpsys-ext.c | 132 ++++++++++++++++++++++++++++++++- 1 file changed, 131 insertions(+), 1 deletion(-) diff --git a/drivers/soc/mediatek/mtk-scpsys-ext.c b/drivers/soc/mediatek/mtk-scpsys-ext.c index 965e64d..e649a06 100644 --- a/drivers/soc/mediatek/mtk-scpsys-ext.c +++ b/drivers/soc/mediatek/mtk-scpsys-ext.c @@ -13,7 +13,7 @@ #include #include #include - +#include #define MAX_CLKS 10 #define INFRA "infracfg" @@ -65,6 +65,21 @@ struct bus_mask_ops { u32 sta_ofs, u32 mask); }; +static struct scpsys_ext_attr *__get_attr_node(const char *scpd_n) +{ + struct scpsys_ext_attr *attr; + + if (!scpd_n) + return ERR_PTR(-EINVAL); + + list_for_each_entry(attr, &ext_attr_map_list, attr_list) { + if (attr->scpd_n && !strcmp(scpd_n, attr->scpd_n)) + return attr; + } + + return ERR_PTR(-EINVAL); +} + static struct scpsys_ext_attr *__get_attr_parent(const char *parent_n) { struct scpsys_ext_attr *attr; @@ -353,8 +368,123 @@ int scpsys_ext_attr_init(const struct scpsys_ext_data *data) return 0; } +/* + * MT6765 extend power domain support + */ + +#define INFRA_TOPAXI_PROTECTEN_SET_MT6765 0x02A0 +#define INFRA_TOPAXI_PROTECTEN_STA1_MT6765 0x0228 +#define INFRA_TOPAXI_PROTECTEN_CLR_MT6765 0x02A4 + +#define INFRA_TOPAXI_PROTECTEN_1_SET_MT6765 0x02A8 +#define INFRA_TOPAXI_PROTECTEN_STA1_1_MT6765 0x0258 +#define INFRA_TOPAXI_PROTECTEN_1_CLR_MT6765 0x02AC + +#define SMI_COMMON_SMI_CLAMP_MT6765 0x03C0 +#define SMI_COMMON_SMI_CLAMP_SET_MT6765 0x03C4 +#define SMI_COMMON_SMI_CLAMP_CLR_MT6765 0x03C8 + +static struct ext_reg_ctrl infra_bus_regs_0_mt6765 = { + .type = IFR_TYPE, + .set_ofs = INFRA_TOPAXI_PROTECTEN_SET_MT6765, + .clr_ofs = INFRA_TOPAXI_PROTECTEN_CLR_MT6765, + .sta_ofs = INFRA_TOPAXI_PROTECTEN_STA1_MT6765, +}; + +#define BUS_IFR0_MT6765(_mask) { \ + .regs = &infra_bus_regs_0_mt6765, \ + .mask = _mask, \ + .ops = &bus_mask_set_clr_ctrl, \ + } + +static struct ext_reg_ctrl infra_bus_regs_1_mt6765 = { + .type = IFR_TYPE, + .set_ofs = INFRA_TOPAXI_PROTECTEN_1_SET_MT6765, + .clr_ofs = INFRA_TOPAXI_PROTECTEN_1_CLR_MT6765, + .sta_ofs = INFRA_TOPAXI_PROTECTEN_STA1_1_MT6765, +}; + +#define BUS_IFR1_MT6765(_mask) { \ + .regs = &infra_bus_regs_1_mt6765, \ + .mask = _mask, \ + .ops = &bus_mask_set_clr_ctrl, \ + } + +static struct ext_reg_ctrl smi_bus_regs_0_mt6765 = { + .type = SMI_TYPE, + .set_ofs = SMI_COMMON_SMI_CLAMP_SET_MT6765, + .clr_ofs = SMI_COMMON_SMI_CLAMP_CLR_MT6765, + .sta_ofs = SMI_COMMON_SMI_CLAMP_MT6765, +}; + +#define BUS_SMI0_MT6765(_mask) { \ + .regs = &smi_bus_regs_0_mt6765, \ + .mask = _mask, \ + .ops = &bus_mask_set_clr_ctrl, \ + } + +static struct scpsys_ext_attr scp_ext_attr_mt6765[] = { + [MT6765_POWER_DOMAIN_ISP] = { + .scpd_n = "isp", + .mask = { + BUS_IFR1_MT6765(BIT(20)), + BUS_SMI0_MT6765(BIT(2)), + }, + .parent_n = "mm", + .bus_ops = &ext_bus_ctrl, + .cg_ops = &ext_cg_ctrl, + }, + [MT6765_POWER_DOMAIN_MM] = { + .scpd_n = "mm", + .mask = { + BUS_IFR1_MT6765(BIT(16) | BIT(17)), + BUS_IFR0_MT6765(BIT(10) | BIT(11)), + BUS_IFR0_MT6765(BIT(1) | BIT(2)), + }, + .bus_ops = &ext_bus_ctrl, + .cg_ops = &ext_cg_ctrl, + }, + [MT6765_POWER_DOMAIN_CONN] = { + .scpd_n = "conn", + .mask = { + BUS_IFR0_MT6765(BIT(13)), + BUS_IFR1_MT6765(BIT(18)), + BUS_IFR0_MT6765(BIT(14) | BIT(16)), + }, + .bus_ops = &ext_bus_ctrl, + }, + [MT6765_POWER_DOMAIN_MFG] = { + .scpd_n = "mfg", + .mask = { + BUS_IFR0_MT6765(BIT(25)), + BUS_IFR0_MT6765(BIT(21) | BIT(22)), + }, + .bus_ops = &ext_bus_ctrl, + }, + [MT6765_POWER_DOMAIN_CAM] = { + .scpd_n = "cam", + .mask = { + BUS_IFR1_MT6765(BIT(19) | BIT(21)), + BUS_IFR0_MT6765(BIT(20)), + BUS_SMI0_MT6765(BIT(3)), + }, + .parent_n = "mm", + .bus_ops = &ext_bus_ctrl, + .cg_ops = &ext_cg_ctrl, + }, +}; + +static const struct scpsys_ext_data scp_ext_data_mt6765 = { + .attr = scp_ext_attr_mt6765, + .num_attr = ARRAY_SIZE(scp_ext_attr_mt6765), + .get_attr = __get_attr_node, +}; + static const struct of_device_id of_scpsys_ext_match_tbl[] = { { + .compatible = "mediatek,mt6765-scpsys", + .data = &scp_ext_data_mt6765, + }, { /* sentinel */ } };