diff mbox series

[v5,3/3] arm64: dts: Add spi slave dts

Message ID 1538131985-9471-4-git-send-email-leilk.liu@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add Mediatek SPI slave driver | expand

Commit Message

Leilk Liu Sept. 28, 2018, 10:53 a.m. UTC 
This patch adds MT2712 spi slave into device tree.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
---
 arch/arm64/boot/dts/mediatek/mt2712e.dtsi |   11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Matthias Brugger Sept. 28, 2018, 9:07 p.m. UTC | #1 
On 28/09/2018 12:53, Leilk Liu wrote:
> This patch adds MT2712 spi slave into device tree.
> 
> Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
> ---

Pushed to v4.19-next/dts64

Thanks!

>  arch/arm64/boot/dts/mediatek/mt2712e.dtsi |   11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> index 75cc0f7..ee627a7 100644
> --- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
> @@ -301,6 +301,17 @@
>  		status = "disabled";
>  	};
>  
> +	spis1: spi@10013000 {
> +		compatible = "mediatek,mt2712-spi-slave";
> +		reg = <0 0x10013000 0 0x100>;
> +		interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&infracfg CLK_INFRA_AO_SPI1>;
> +		clock-names = "spi";
> +		assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;
> +		assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>;
> +		status = "disabled";
> +	};
> +
>  	apmixedsys: syscon@10209000 {
>  		compatible = "mediatek,mt2712-apmixedsys", "syscon";
>  		reg = <0 0x10209000 0 0x1000>;
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
index 75cc0f7..ee627a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt2712e.dtsi
@@ -301,6 +301,17 @@ 
 		status = "disabled";
 	};
 
+	spis1: spi@10013000 {
+		compatible = "mediatek,mt2712-spi-slave";
+		reg = <0 0x10013000 0 0x100>;
+		interrupts = <GIC_SPI 283 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&infracfg CLK_INFRA_AO_SPI1>;
+		clock-names = "spi";
+		assigned-clocks = <&topckgen CLK_TOP_SPISLV_SEL>;
+		assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL1_D2>;
+		status = "disabled";
+	};
+
 	apmixedsys: syscon@10209000 {
 		compatible = "mediatek,mt2712-apmixedsys", "syscon";
 		reg = <0 0x10209000 0 0x1000>;