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Thu, 22 Oct 2020 04:56:10 -0800 Received: from mtkmbs07n1.mediatek.inc (172.21.101.16) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Oct 2020 05:56:08 -0700 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Oct 2020 20:56:06 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Oct 2020 20:56:07 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Nicolas Boichat Subject: [PATCH 01/12] clk: mediatek: Clean up the pll_en_bit from en_mask on MT2701 Date: Thu, 22 Oct 2020 20:55:54 +0800 Message-ID: <1603371365-30863-2-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1603371365-30863-1-git-send-email-weiyi.lu@mediatek.com> References: <1603371365-30863-1-git-send-email-weiyi.lu@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201022_085617_607095_4D90947C X-CRM114-Status: GOOD ( 11.41 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Weiyi Lu , srv_heupstream@mediatek.com, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org remove pll_en_bit(bit0) from en_mask to make en_mask a pure en_mask that only used for pll dividers. Signed-off-by: Weiyi Lu --- drivers/clk/mediatek/clk-mt2701.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt2701.c b/drivers/clk/mediatek/clk-mt2701.c index 695be0f..462a998 100644 --- a/drivers/clk/mediatek/clk-mt2701.c +++ b/drivers/clk/mediatek/clk-mt2701.c @@ -934,31 +934,31 @@ static int mtk_pericfg_init(struct platform_device *pdev) } static const struct mtk_pll_data apmixed_plls[] = { - PLL(CLK_APMIXED_ARMPLL, "armpll", 0x200, 0x20c, 0x80000001, + PLL(CLK_APMIXED_ARMPLL, "armpll", 0x200, 0x20c, 0x80000000, PLL_AO, 21, 0x204, 24, 0x0, 0x204, 0), - PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x210, 0x21c, 0xf0000001, + PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x210, 0x21c, 0xf0000000, HAVE_RST_BAR, 21, 0x210, 4, 0x0, 0x214, 0), - PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000001, + PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000000, HAVE_RST_BAR, 7, 0x220, 4, 0x0, 0x224, 14), - PLL(CLK_APMIXED_MMPLL, "mmpll", 0x230, 0x23c, 0x00000001, 0, + PLL(CLK_APMIXED_MMPLL, "mmpll", 0x230, 0x23c, 0, 0, 21, 0x230, 4, 0x0, 0x234, 0), - PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x240, 0x24c, 0x00000001, 0, + PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x240, 0x24c, 0, 0, 21, 0x240, 4, 0x0, 0x244, 0), - PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x250, 0x25c, 0x00000001, 0, + PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x250, 0x25c, 0, 0, 21, 0x250, 4, 0x0, 0x254, 0), - PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x270, 0x27c, 0x00000001, 0, + PLL(CLK_APMIXED_AUD1PLL, "aud1pll", 0x270, 0x27c, 0, 0, 31, 0x270, 4, 0x0, 0x274, 0), - PLL(CLK_APMIXED_TRGPLL, "trgpll", 0x280, 0x28c, 0x00000001, 0, + PLL(CLK_APMIXED_TRGPLL, "trgpll", 0x280, 0x28c, 0, 0, 31, 0x280, 4, 0x0, 0x284, 0), - PLL(CLK_APMIXED_ETHPLL, "ethpll", 0x290, 0x29c, 0x00000001, 0, + PLL(CLK_APMIXED_ETHPLL, "ethpll", 0x290, 0x29c, 0, 0, 31, 0x290, 4, 0x0, 0x294, 0), - PLL(CLK_APMIXED_VDECPLL, "vdecpll", 0x2a0, 0x2ac, 0x00000001, 0, + PLL(CLK_APMIXED_VDECPLL, "vdecpll", 0x2a0, 0x2ac, 0, 0, 31, 0x2a0, 4, 0x0, 0x2a4, 0), - PLL(CLK_APMIXED_HADDS2PLL, "hadds2pll", 0x2b0, 0x2bc, 0x00000001, 0, + PLL(CLK_APMIXED_HADDS2PLL, "hadds2pll", 0x2b0, 0x2bc, 0, 0, 31, 0x2b0, 4, 0x0, 0x2b4, 0), - PLL(CLK_APMIXED_AUD2PLL, "aud2pll", 0x2c0, 0x2cc, 0x00000001, 0, + PLL(CLK_APMIXED_AUD2PLL, "aud2pll", 0x2c0, 0x2cc, 0, 0, 31, 0x2c0, 4, 0x0, 0x2c4, 0), - PLL(CLK_APMIXED_TVD2PLL, "tvd2pll", 0x2d0, 0x2dc, 0x00000001, 0, + PLL(CLK_APMIXED_TVD2PLL, "tvd2pll", 0x2d0, 0x2dc, 0, 0, 21, 0x2d0, 4, 0x0, 0x2d4, 0), };