diff mbox series

[v3] pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm

Message ID 1664447209-19417-1-git-send-email-xinlei.lee@mediatek.com (mailing list archive)
State New, archived
Headers show
Series [v3] pwm: mtk-disp: Fix the parameters calculated by the enabled flag of disp_pwm | expand

Commit Message

Xinlei Lee (李昕磊) Sept. 29, 2022, 10:26 a.m. UTC 
From: xinlei lee <xinlei.lee@mediatek.com>

In the original mtk_disp_pwm_get_state() function, the result of reading
con0 & BIT(0) is enabled as disp_pwm.
In order to conform to the register table, we should use the disp_pwm
base address as the enabled judgment.

Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")

Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
---
Base on the branch of Linux-next/master.

change since v2:
1. Modify the code for readability.

change since v1:
1. Modify the way to set disp_pwm enbale.
---
---
 drivers/pwm/pwm-mtk-disp.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Uwe Kleine-König Oct. 19, 2022, 7:19 a.m. UTC | #1 
Hello,

On Thu, Sep 29, 2022 at 06:26:49PM +0800, xinlei.lee@mediatek.com wrote:
> From: xinlei lee <xinlei.lee@mediatek.com>
> 
> In the original mtk_disp_pwm_get_state() function, the result of reading
> con0 & BIT(0) is enabled as disp_pwm.
> In order to conform to the register table, we should use the disp_pwm
> base address as the enabled judgment.

I assume the change is fine. However I don't understand the commit log.
My guess is you mean:

	mtk_disp_pwm_get_state() wrongly uses bit 0 of CON0 to judge if the
	PWM is enabled. However that is indicated by a bit (at a machine
	dependent position) in the DISP_PWM_EN register. Fix this
	accordingly.

> Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API .get_state()")
> 
> Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>

Nitpick: There is no empty line between Fixes: and S-o-b.

Best regards
Uwe
Xinlei Lee (李昕磊) Oct. 19, 2022, 9:21 a.m. UTC | #2 
On Wed, 2022-10-19 at 09:19 +0200, Uwe Kleine-König wrote:
> Hello,
> 
> On Thu, Sep 29, 2022 at 06:26:49PM +0800, xinlei.lee@mediatek.com
> wrote:
> > From: xinlei lee <xinlei.lee@mediatek.com>
> > 
> > In the original mtk_disp_pwm_get_state() function, the result of
> > reading
> > con0 & BIT(0) is enabled as disp_pwm.
> > In order to conform to the register table, we should use the
> > disp_pwm
> > base address as the enabled judgment.
> 
> I assume the change is fine. However I don't understand the commit
> log.
> My guess is you mean:
> 
> 	mtk_disp_pwm_get_state() wrongly uses bit 0 of CON0 to judge if
> the
> 	PWM is enabled. However that is indicated by a bit (at a
> machine
> 	dependent position) in the DISP_PWM_EN register. Fix this
> 	accordingly.
> 
> > Fixes: 3f2b16734914 ("pwm: mtk-disp: Implement atomic API
> > .get_state()")
> > 
> > Signed-off-by: xinlei lee <xinlei.lee@mediatek.com>
> 
> Nitpick: There is no empty line between Fixes: and S-o-b.
> 
> Best regards
> Uwe
> 

Hi Uwe:

Yes, as you describe, I will remove the blank lines you mentioned in
the next version.

Best Regards!
xinlei
diff mbox series

Patch

diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c
index c605013e4114..3fbb4bae93a4 100644
--- a/drivers/pwm/pwm-mtk-disp.c
+++ b/drivers/pwm/pwm-mtk-disp.c
@@ -178,7 +178,7 @@  static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
 {
 	struct mtk_disp_pwm *mdp = to_mtk_disp_pwm(chip);
 	u64 rate, period, high_width;
-	u32 clk_div, con0, con1;
+	u32 clk_div, pwm_en, con0, con1;
 	int err;
 
 	err = clk_prepare_enable(mdp->clk_main);
@@ -197,7 +197,8 @@  static void mtk_disp_pwm_get_state(struct pwm_chip *chip,
 	rate = clk_get_rate(mdp->clk_main);
 	con0 = readl(mdp->base + mdp->data->con0);
 	con1 = readl(mdp->base + mdp->data->con1);
-	state->enabled = !!(con0 & BIT(0));
+	pwm_en = readl(mdp->base + DISP_PWM_EN);
+	state->enabled = !!(pwm_en & mdp->data->enable_mask);
 	clk_div = FIELD_GET(PWM_CLKDIV_MASK, con0);
 	period = FIELD_GET(PWM_PERIOD_MASK, con1);
 	/*