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[1/7] drm/mediatek: move dpi private data to device

Message ID 20180508022057.29379-2-bibby.hsieh@mediatek.com (mailing list archive)
State New, archived
Headers show

Commit Message

Bibby Hsieh May 8, 2018, 2:20 a.m. UTC
From: chunhui dai <chunhui.dai@mediatek.com>

move colck factor and edge enable setting to private data.

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
---
 drivers/gpu/drm/mediatek/mtk_dpi.c      | 80 ++++++++++++++++++++++++++-------
 drivers/gpu/drm/mediatek/mtk_dpi_regs.h |  2 +-
 2 files changed, 65 insertions(+), 17 deletions(-)

Comments

kernel test robot May 8, 2018, 5:19 p.m. UTC | #1
Hi chunhui,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm/drm-next]
[also build test WARNING on v4.17-rc4 next-20180507]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Bibby-Hsieh/drm-mediatek-support-hdmi-output-for-mt2701-and-mt7623/20180508-140924
base:   git://people.freedesktop.org/~airlied/linux.git drm-next
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        make.cross ARCH=arm 

Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings

All warnings (new ones prefixed by >>):

   drivers/gpu//drm/mediatek/mtk_dpi.c: In function 'mtk_dpi_power_on':
>> drivers/gpu//drm/mediatek/mtk_dpi.c:444:9: warning: 'ret' may be used uninitialized in this function [-Wmaybe-uninitialized]
     return ret;
            ^~~

vim +/ret +444 drivers/gpu//drm/mediatek/mtk_dpi.c

9e629c17 Jie Qiu     2016-01-04  405  
9e629c17 Jie Qiu     2016-01-04  406  static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
9e629c17 Jie Qiu     2016-01-04  407  {
9e629c17 Jie Qiu     2016-01-04  408  	int ret;
9e629c17 Jie Qiu     2016-01-04  409  
51df75e5 chunhui dai 2018-05-08  410  	if (++dpi->refcount != 1)
51df75e5 chunhui dai 2018-05-08  411  		return 0;
51df75e5 chunhui dai 2018-05-08  412  
9e629c17 Jie Qiu     2016-01-04  413  	dpi->power_ctl |= pctl;
9e629c17 Jie Qiu     2016-01-04  414  
9e629c17 Jie Qiu     2016-01-04  415  	if (!(dpi->power_ctl & DPI_POWER_START) &&
9e629c17 Jie Qiu     2016-01-04  416  	    !(dpi->power_ctl & DPI_POWER_ENABLE))
51df75e5 chunhui dai 2018-05-08  417  		goto err_refcount;
9e629c17 Jie Qiu     2016-01-04  418  
9e629c17 Jie Qiu     2016-01-04  419  	if (dpi->power_sta)
51df75e5 chunhui dai 2018-05-08  420  		goto err_refcount;
9e629c17 Jie Qiu     2016-01-04  421  
9e629c17 Jie Qiu     2016-01-04  422  	ret = clk_prepare_enable(dpi->engine_clk);
9e629c17 Jie Qiu     2016-01-04  423  	if (ret) {
9e629c17 Jie Qiu     2016-01-04  424  		dev_err(dpi->dev, "Failed to enable engine clock: %d\n", ret);
9e629c17 Jie Qiu     2016-01-04  425  		goto err_eng;
9e629c17 Jie Qiu     2016-01-04  426  	}
9e629c17 Jie Qiu     2016-01-04  427  
9e629c17 Jie Qiu     2016-01-04  428  	ret = clk_prepare_enable(dpi->pixel_clk);
9e629c17 Jie Qiu     2016-01-04  429  	if (ret) {
9e629c17 Jie Qiu     2016-01-04  430  		dev_err(dpi->dev, "Failed to enable pixel clock: %d\n", ret);
9e629c17 Jie Qiu     2016-01-04  431  		goto err_pixel;
9e629c17 Jie Qiu     2016-01-04  432  	}
9e629c17 Jie Qiu     2016-01-04  433  
9e629c17 Jie Qiu     2016-01-04  434  	mtk_dpi_enable(dpi);
9e629c17 Jie Qiu     2016-01-04  435  	dpi->power_sta = true;
9e629c17 Jie Qiu     2016-01-04  436  	return 0;
9e629c17 Jie Qiu     2016-01-04  437  
9e629c17 Jie Qiu     2016-01-04  438  err_pixel:
9e629c17 Jie Qiu     2016-01-04  439  	clk_disable_unprepare(dpi->engine_clk);
9e629c17 Jie Qiu     2016-01-04  440  err_eng:
9e629c17 Jie Qiu     2016-01-04  441  	dpi->power_ctl &= ~pctl;
51df75e5 chunhui dai 2018-05-08  442  err_refcount:
51df75e5 chunhui dai 2018-05-08  443  	dpi->refcount--;
9e629c17 Jie Qiu     2016-01-04 @444  	return ret;
9e629c17 Jie Qiu     2016-01-04  445  }
9e629c17 Jie Qiu     2016-01-04  446  

:::::: The code at line 444 was first introduced by commit
:::::: 9e629c17aa8d7a75b8c1d99ed42892cd8ba7cdc4 drm/mediatek: Add DPI sub driver

:::::: TO: Jie Qiu <jie.qiu@mediatek.com>
:::::: CC: Philipp Zabel <p.zabel@pengutronix.de>

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
diff mbox

Patch

diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index e80a603e5fb0..0a44ab175422 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -71,11 +71,13 @@  struct mtk_dpi {
 	struct clk *tvd_clk;
 	int irq;
 	struct drm_display_mode mode;
+	const struct mtk_dpi_conf *conf;
 	enum mtk_dpi_out_color_format color_format;
 	enum mtk_dpi_out_yc_map yc_map;
 	enum mtk_dpi_out_bit_num bit_num;
 	enum mtk_dpi_out_channel_swap channel_swap;
 	bool power_sta;
+	int refcount;
 	u8 power_ctl;
 };
 
@@ -115,6 +117,12 @@  struct mtk_dpi_yc_limit {
 	u16 c_bottom;
 };
 
+struct mtk_dpi_conf {
+	unsigned int (*cal_factor)(int clock);
+	const u32 reg_h_fre_con;
+	bool edge_sel_en;
+};
+
 static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
 {
 	u32 tmp = readl(dpi->regs + offset) & ~mask;
@@ -340,7 +348,13 @@  static void mtk_dpi_config_swap_input(struct mtk_dpi *dpi, bool enable)
 
 static void mtk_dpi_config_2n_h_fre(struct mtk_dpi *dpi)
 {
-	mtk_dpi_mask(dpi, DPI_H_FRE_CON, H_FRE_2N, H_FRE_2N);
+	mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, H_FRE_2N, H_FRE_2N);
+}
+
+static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi)
+{
+	if (dpi->conf->edge_sel_en)
+		mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN);
 }
 
 static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
@@ -368,6 +382,12 @@  static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
 
 static void mtk_dpi_power_off(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
 {
+	if (WARN_ON(dpi->refcount == 0))
+		return;
+
+	if (--dpi->refcount != 0)
+		return;
+
 	dpi->power_ctl &= ~pctl;
 
 	if ((dpi->power_ctl & DPI_POWER_START) ||
@@ -387,14 +407,17 @@  static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
 {
 	int ret;
 
+	if (++dpi->refcount != 1)
+		return 0;
+
 	dpi->power_ctl |= pctl;
 
 	if (!(dpi->power_ctl & DPI_POWER_START) &&
 	    !(dpi->power_ctl & DPI_POWER_ENABLE))
-		return 0;
+		goto err_refcount;
 
 	if (dpi->power_sta)
-		return 0;
+		goto err_refcount;
 
 	ret = clk_prepare_enable(dpi->engine_clk);
 	if (ret) {
@@ -416,6 +439,8 @@  static int mtk_dpi_power_on(struct mtk_dpi *dpi, enum mtk_dpi_power_ctl pctl)
 	clk_disable_unprepare(dpi->engine_clk);
 err_eng:
 	dpi->power_ctl &= ~pctl;
+err_refcount:
+	dpi->refcount--;
 	return ret;
 }
 
@@ -433,16 +458,13 @@  static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
 	unsigned long pll_rate;
 	unsigned int factor;
 
+	if (!dpi) {
+		dev_err(dpi->dev, "invalid argument\n");
+		return -EINVAL;
+	}
 	/* let pll_rate can fix the valid range of tvdpll (1G~2GHz) */
 	pix_rate = 1000UL * mode->clock;
-	if (mode->clock <= 27000)
-		factor = 16 * 3;
-	else if (mode->clock <= 84000)
-		factor = 8 * 3;
-	else if (mode->clock <= 167000)
-		factor = 4 * 3;
-	else
-		factor = 2 * 3;
+	factor = dpi->conf->cal_factor(mode->clock);
 	pll_rate = pix_rate * factor;
 
 	dev_dbg(dpi->dev, "Want PLL %lu Hz, pixel clock %lu Hz\n",
@@ -518,6 +540,7 @@  static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
 	mtk_dpi_config_yc_map(dpi, dpi->yc_map);
 	mtk_dpi_config_color_format(dpi, dpi->color_format);
 	mtk_dpi_config_2n_h_fre(dpi);
+	mtk_dpi_config_disable_edge(dpi);
 	mtk_dpi_sw_reset(dpi, false);
 
 	return 0;
@@ -656,6 +679,31 @@  static const struct component_ops mtk_dpi_component_ops = {
 	.unbind = mtk_dpi_unbind,
 };
 
+static unsigned int mt8173_calculate_factor(int clock)
+{
+	if (clock <= 27000)
+		return 16 * 3;
+	else if (clock <= 74250)
+		return 8 * 3;
+	else if (clock <= 167000)
+		return 4 * 3;
+	else
+		return 2 * 3;
+}
+
+static const struct mtk_dpi_conf mt8173_conf = {
+	.cal_factor = mt8173_calculate_factor,
+	.reg_h_fre_con = 0xe0,
+};
+
+static const struct of_device_id mtk_dpi_of_ids[] = {
+	{ .compatible = "mediatek,mt8173-dpi",
+	  .data = &mt8173_conf,
+	},
+	{ },
+};
+MODULE_DEVICE_TABLE(of, mtk_dpi_of_ids);
+
 static int mtk_dpi_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
@@ -663,13 +711,18 @@  static int mtk_dpi_probe(struct platform_device *pdev)
 	struct resource *mem;
 	struct device_node *bridge_node;
 	int comp_id;
+	const struct of_device_id *match;
 	int ret;
 
+	match = of_match_node(mtk_dpi_of_ids, dev->of_node);
+	if (!match)
+		return -ENODEV;
 	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
 	if (!dpi)
 		return -ENOMEM;
 
 	dpi->dev = dev;
+	dpi->conf = (struct mtk_dpi_conf *)match->data;
 
 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	dpi->regs = devm_ioremap_resource(dev, mem);
@@ -748,11 +801,6 @@  static int mtk_dpi_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static const struct of_device_id mtk_dpi_of_ids[] = {
-	{ .compatible = "mediatek,mt8173-dpi", },
-	{}
-};
-
 struct platform_driver mtk_dpi_driver = {
 	.probe = mtk_dpi_probe,
 	.remove = mtk_dpi_remove,
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
index 4b6ad4751a31..d9db8c4cacd7 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
+++ b/drivers/gpu/drm/mediatek/mtk_dpi_regs.h
@@ -223,6 +223,6 @@ 
 #define ESAV_CODE2			(0xFFF << 0)
 #define ESAV_CODE3_MSB			BIT(16)
 
-#define DPI_H_FRE_CON		0xE0
+#define EDGE_SEL_EN			BIT(5)
 #define H_FRE_2N			BIT(25)
 #endif /* __MTK_DPI_REGS_H */