From patchwork Mon Apr 29 06:38:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: xiaolei li X-Patchwork-Id: 10921307 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B8B801398 for ; Mon, 29 Apr 2019 06:39:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A77B7285D8 for ; Mon, 29 Apr 2019 06:39:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9BD88285FB; Mon, 29 Apr 2019 06:39:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3D3C7285D8 for ; Mon, 29 Apr 2019 06:39:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2rJy1fSnHzG3iZvssF0ohIZj4o+k4c0H7R+ZSBNdMVk=; b=VYoC8uwmSAIwMR VBDzpF5KYCB56sdiGcfdTqUoEY+iSPA3JFHpLqhb3K0tdZyE9aQKa7W+tTK40fwWZDCENZsXIPHfp Q5tyse4vvkZV5sZHlR+sLY9MdEC1VdD2XViKHbFC4nw7XwhYQbN5OmJxEGBs3TmFipwzJVPttvLs1 h45toBcDyZvwNr1nefa4sgc/J0Hm+3GNeIXAo6aUlzhO9WfKPKDiy1Vv+cj9yHKwgfj4AQ/FtmWLx YCCdeJlzoCoXMb6t+PhhOl+s+f5DhLn8ccRijyt9preMKZGT+7rgnE8aQN9fHZgwU5L6jb8fZluZh XAMgRKSfmz3WUvWYT4bg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKzwm-0006Rr-IF; Mon, 29 Apr 2019 06:39:28 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1hKzw8-0005WA-7x; Mon, 29 Apr 2019 06:38:53 +0000 X-UUID: 92dbac9b124b47c88adf514b7077bbca-20190428 X-UUID: 92dbac9b124b47c88adf514b7077bbca-20190428 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1102790042; Sun, 28 Apr 2019 22:38:40 -0800 Received: from mtkmbs03n1.mediatek.inc (172.21.101.181) by MTKMBS62DR.mediatek.inc (172.29.94.18) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 28 Apr 2019 23:38:39 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs03n1.mediatek.inc (172.21.101.181) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 29 Apr 2019 14:38:38 +0800 Received: from mtkslt306.mediatek.inc (10.21.14.136) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 29 Apr 2019 14:38:38 +0800 From: Xiaolei Li To: , Subject: [PATCH 1/5] mtd: rawnand: mtk: Correct low level time calculation of r/w cycle Date: Mon, 29 Apr 2019 14:38:30 +0800 Message-ID: <20190429063834.45967-2-xiaolei.li@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20190429063834.45967-1-xiaolei.li@mediatek.com> References: <20190429063834.45967-1-xiaolei.li@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190428_233848_668583_AB467084 X-CRM114-Status: GOOD ( 11.89 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-mediatek@lists.infradead.org, xiaolei.li@mediatek.com, linux-mtd@lists.infradead.org, srv_heupstream@mediatek.com Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP At present, the flow of calculating AC timing of read/write cycle in SDR mode is that: At first, calculate high hold time which is valid for both read and write cycle using the max value between tREH_min and tWH_min. Secondly, calculate WE# pulse width using tWP_min. Thridly, calculate RE# pulse width using the bigger one between tREA_max and tRP_min. But NAND SPEC shows that Controller should also meet write/read cycle time. That is write cycle time should be more than tWC_min and read cycle should be more than tRC_min. Obviously, we do not achieve that now. This patch corrects the low level time calculation to meet minimum read/write cycle time required. After getting the high hold time, WE# low level time will be promised to meet tWP_min and tWC_min requirement, and RE# low level time will be promised to meet tREA_max, tRP_min and tRC_min requirement. Fixes: 93db446a424c ("mtd: nand: move raw NAND related code to the raw/ subdir") Signed-off-by: Xiaolei Li Reviewed-by: Miquel Raynal --- drivers/mtd/nand/raw/mtk_nand.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/raw/mtk_nand.c b/drivers/mtd/nand/raw/mtk_nand.c index b6b4602f5132..dd855f860a4b 100644 --- a/drivers/mtd/nand/raw/mtk_nand.c +++ b/drivers/mtd/nand/raw/mtk_nand.c @@ -508,7 +508,7 @@ static int mtk_nfc_setup_data_interface(struct nand_chip *chip, int csline, { struct mtk_nfc *nfc = nand_get_controller_data(chip); const struct nand_sdr_timings *timings; - u32 rate, tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt; + u32 rate, tpoecs, tprecs, tc2r, tw2r, twh, twst = 0, trlt = 0; timings = nand_get_sdr_timings(conf); if (IS_ERR(timings)) @@ -544,11 +544,19 @@ static int mtk_nfc_setup_data_interface(struct nand_chip *chip, int csline, twh = DIV_ROUND_UP(twh * rate, 1000000) - 1; twh &= 0xf; - twst = timings->tWP_min / 1000; + /* Calculate min low level timing for write cycle */ + if ((twh + 1) * 1000000 / rate < timings->tWC_min / 1000) + twst = (timings->tWC_min / 1000 - (twh + 1) * 1000000 / rate) + * 1000; + twst = max(timings->tWP_min, twst) / 1000; twst = DIV_ROUND_UP(twst * rate, 1000000) - 1; twst &= 0xf; - trlt = max(timings->tREA_max, timings->tRP_min) / 1000; + /* Calculate min low level timing for read cycle */ + if ((twh + 1) * 1000000 / rate < timings->tRC_min / 1000) + trlt = (timings->tRC_min / 1000 - (twh + 1) * 1000000 / rate) + * 1000; + trlt = max3(trlt, timings->tREA_max, timings->tRP_min) / 1000; trlt = DIV_ROUND_UP(trlt * rate, 1000000) - 1; trlt &= 0xf;