| Message ID | 20190701074842.15401-12-bibby.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support gce on mt8183 platform | expand |
Hi, Bibby: On Mon, 2019-07-01 at 15:48 +0800, Bibby Hsieh wrote: > GCE cannot know the register base address, this function > can help cmdq client to get the cmdq_client_reg structure. > Reviewed-by: CK Hu <ck.hu@mediatek.com> > Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> > --- > drivers/soc/mediatek/mtk-cmdq-helper.c | 28 ++++++++++++++++++++++++++ > include/linux/soc/mediatek/mtk-cmdq.h | 21 +++++++++++++++++++ > 2 files changed, 49 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c > index 70ad4d806fac..ad52ac3ccfbb 100644 > --- a/drivers/soc/mediatek/mtk-cmdq-helper.c > +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c > @@ -27,6 +27,34 @@ struct cmdq_instruction { > u8 op; > }; > > +int cmdq_dev_get_client_reg(struct device *dev, > + struct cmdq_client_reg *client_reg, int idx) > +{ > + struct of_phandle_args spec; > + int err; > + > + if (!client_reg) > + return -ENOENT; > + > + err = of_parse_phandle_with_args(dev->of_node, "mediatek,gce-client-reg", > + "#subsys-cells", idx, &spec); > + if (err < 0) { > + dev_err(dev, > + "error %d can't parse gce-client-reg property (%d)", > + err, idx); > + > + return err; > + } > + > + client_reg->subsys = spec.args[0]; > + client_reg->offset = spec.args[1]; > + client_reg->size = spec.args[2]; > + of_node_put(spec.np); > + > + return 0; > +} > +EXPORT_SYMBOL(cmdq_dev_get_client_reg); > + > static void cmdq_client_timeout(struct timer_list *t) > { > struct cmdq_client *client = from_timer(client, t, timer); > diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h > index a345870a6d10..be402c4c740e 100644 > --- a/include/linux/soc/mediatek/mtk-cmdq.h > +++ b/include/linux/soc/mediatek/mtk-cmdq.h > @@ -15,6 +15,12 @@ > > struct cmdq_pkt; > > +struct cmdq_client_reg { > + u8 subsys; > + u16 offset; > + u16 size; > +}; > + > struct cmdq_client { > spinlock_t lock; > u32 pkt_cnt; > @@ -142,4 +148,19 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, > */ > int cmdq_pkt_flush(struct cmdq_pkt *pkt); > > +/** > + * cmdq_dev_get_client_reg() - parse cmdq client reg from the device > + * node of CMDQ client > + * @dev: device of CMDQ mailbox clienti > + * @client_reg: CMDQ client reg pointer > + * @idx: the index of desired reg > + * > + * Return: 0 for success; else the error code is returned > + * > + * Help CMDQ client pasing the cmdq client reg > + * from the device node of CMDQ client. > + */ > +int cmdq_dev_get_client_reg(struct device *dev, > + struct cmdq_client_reg *client_reg, int idx); > + > #endif /* __MTK_CMDQ_H__ */
diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 70ad4d806fac..ad52ac3ccfbb 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -27,6 +27,34 @@ struct cmdq_instruction { u8 op; }; +int cmdq_dev_get_client_reg(struct device *dev, + struct cmdq_client_reg *client_reg, int idx) +{ + struct of_phandle_args spec; + int err; + + if (!client_reg) + return -ENOENT; + + err = of_parse_phandle_with_args(dev->of_node, "mediatek,gce-client-reg", + "#subsys-cells", idx, &spec); + if (err < 0) { + dev_err(dev, + "error %d can't parse gce-client-reg property (%d)", + err, idx); + + return err; + } + + client_reg->subsys = spec.args[0]; + client_reg->offset = spec.args[1]; + client_reg->size = spec.args[2]; + of_node_put(spec.np); + + return 0; +} +EXPORT_SYMBOL(cmdq_dev_get_client_reg); + static void cmdq_client_timeout(struct timer_list *t) { struct cmdq_client *client = from_timer(client, t, timer); diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index a345870a6d10..be402c4c740e 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -15,6 +15,12 @@ struct cmdq_pkt; +struct cmdq_client_reg { + u8 subsys; + u16 offset; + u16 size; +}; + struct cmdq_client { spinlock_t lock; u32 pkt_cnt; @@ -142,4 +148,19 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, */ int cmdq_pkt_flush(struct cmdq_pkt *pkt); +/** + * cmdq_dev_get_client_reg() - parse cmdq client reg from the device + * node of CMDQ client + * @dev: device of CMDQ mailbox clienti + * @client_reg: CMDQ client reg pointer + * @idx: the index of desired reg + * + * Return: 0 for success; else the error code is returned + * + * Help CMDQ client pasing the cmdq client reg + * from the device node of CMDQ client. + */ +int cmdq_dev_get_client_reg(struct device *dev, + struct cmdq_client_reg *client_reg, int idx); + #endif /* __MTK_CMDQ_H__ */
GCE cannot know the register base address, this function can help cmdq client to get the cmdq_client_reg structure. Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> --- drivers/soc/mediatek/mtk-cmdq-helper.c | 28 ++++++++++++++++++++++++++ include/linux/soc/mediatek/mtk-cmdq.h | 21 +++++++++++++++++++ 2 files changed, 49 insertions(+)