| Message ID | 20190729070106.9332-13-bibby.hsieh@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | support gce on mt8183 platform | expand |
On Mon, 2019-07-29 at 15:01 +0800, Bibby Hsieh wrote: > add gce device node for mt8183 > > Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> > --- > arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > index 08274bfcebd8..98d17d0bdebf 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi > @@ -8,6 +8,7 @@ > #include <dt-bindings/clock/mt8183-clk.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/gce/mt8183-gce.h> > > / { > compatible = "mediatek,mt8183"; > @@ -212,6 +213,15 @@ > clock-names = "spi", "wrap"; > }; > > + gce: gce@10238000 { Use mailbox@ instead of gce@, Rob suggested in https://patchwork.kernel.org/patch/10491213/ > + compatible = "mediatek,mt8183-gce"; > + reg = <0 0x10238000 0 0x4000>; > + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; > + #mbox-cells = <3>; > + clocks = <&infracfg CLK_INFRA_GCE>; > + clock-names = "gce"; > + }; > + > uart0: serial@11002000 { > compatible = "mediatek,mt8183-uart", > "mediatek,mt6577-uart";
diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 08274bfcebd8..98d17d0bdebf 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -8,6 +8,7 @@ #include <dt-bindings/clock/mt8183-clk.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/gce/mt8183-gce.h> / { compatible = "mediatek,mt8183"; @@ -212,6 +213,15 @@ clock-names = "spi", "wrap"; }; + gce: gce@10238000 { + compatible = "mediatek,mt8183-gce"; + reg = <0 0x10238000 0 0x4000>; + interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_LOW>; + #mbox-cells = <3>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8183-uart", "mediatek,mt6577-uart";
add gce device node for mt8183 Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com> --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)