| Message ID | 20191016200647.32050-6-robh@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | PCI host resource consolidation | expand |
On Wed, Oct 16, 2019 at 03:06:27PM -0500, Rob Herring wrote: > Convert the Designware host bridge to use the common > pci_parse_request_of_pci_ranges(). > > Cc: Jingoo Han <jingoohan1@gmail.com> > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Cc: Andrew Murray <andrew.murray@arm.com> > Cc: Bjorn Helgaas <bhelgaas@google.com> > Signed-off-by: Rob Herring <robh@kernel.org> > --- > v2: > - New patch > > .../pci/controller/dwc/pcie-designware-host.c | 28 ++++++------------- > 1 file changed, 8 insertions(+), 20 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index 0f36a926059a..aeec8b65eb97 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -319,7 +319,7 @@ int dw_pcie_host_init(struct pcie_port *pp) > struct device *dev = pci->dev; > struct device_node *np = dev->of_node; > struct platform_device *pdev = to_platform_device(dev); > - struct resource_entry *win, *tmp; > + struct resource_entry *win; > struct pci_bus *child; > struct pci_host_bridge *bridge; > struct resource *cfg_res; > @@ -342,31 +342,19 @@ int dw_pcie_host_init(struct pcie_port *pp) > if (!bridge) > return -ENOMEM; > > - ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, > - &bridge->windows, &pp->io_base); > - if (ret) > - return ret; > - > - ret = devm_request_pci_bus_resources(dev, &bridge->windows); > + ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL); > if (ret) > return ret; > > /* Get the I/O and memory ranges from DT */ > - resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { > + resource_list_for_each_entry(win, &bridge->windows) { > switch (resource_type(win->res)) { > case IORESOURCE_IO: > - ret = devm_pci_remap_iospace(dev, win->res, > - pp->io_base); > - if (ret) { > - dev_warn(dev, "Error %d: failed to map resource %pR\n", > - ret, win->res); > - resource_list_destroy_entry(win); > - } else { > - pp->io = win->res; > - pp->io->name = "I/O"; > - pp->io_size = resource_size(pp->io); > - pp->io_bus_addr = pp->io->start - win->offset; > - } > + pp->io = win->res; > + pp->io->name = "I/O"; > + pp->io_size = resource_size(pp->io); > + pp->io_bus_addr = pp->io->start - win->offset; > + pp->io_base = pci_pio_to_address(pp->io->start); Where did io_base come from? This wasn't here before, so why are we setting it now? Does this fix any issue? Thanks, Andrew Murray > break; > case IORESOURCE_MEM: > pp->mem = win->res; > -- > 2.20.1
On Fri, Oct 18, 2019 at 7:35 AM Andrew Murray <andrew.murray@arm.com> wrote: > > On Wed, Oct 16, 2019 at 03:06:27PM -0500, Rob Herring wrote: > > Convert the Designware host bridge to use the common > > pci_parse_request_of_pci_ranges(). > > > > Cc: Jingoo Han <jingoohan1@gmail.com> > > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > > Cc: Andrew Murray <andrew.murray@arm.com> > > Cc: Bjorn Helgaas <bhelgaas@google.com> > > Signed-off-by: Rob Herring <robh@kernel.org> > > --- > > v2: > > - New patch > > > > .../pci/controller/dwc/pcie-designware-host.c | 28 ++++++------------- > > 1 file changed, 8 insertions(+), 20 deletions(-) > > > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > > index 0f36a926059a..aeec8b65eb97 100644 > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > > @@ -319,7 +319,7 @@ int dw_pcie_host_init(struct pcie_port *pp) > > struct device *dev = pci->dev; > > struct device_node *np = dev->of_node; > > struct platform_device *pdev = to_platform_device(dev); > > - struct resource_entry *win, *tmp; > > + struct resource_entry *win; > > struct pci_bus *child; > > struct pci_host_bridge *bridge; > > struct resource *cfg_res; > > @@ -342,31 +342,19 @@ int dw_pcie_host_init(struct pcie_port *pp) > > if (!bridge) > > return -ENOMEM; > > > > - ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, > > - &bridge->windows, &pp->io_base); [...] > > + pp->io_bus_addr = pp->io->start - win->offset; > > + pp->io_base = pci_pio_to_address(pp->io->start); > > Where did io_base come from? This wasn't here before, so why are we setting it > now? It was set in the removed devm_of_pci_get_host_bridge_resources(). Rob
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 0f36a926059a..aeec8b65eb97 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -319,7 +319,7 @@ int dw_pcie_host_init(struct pcie_port *pp) struct device *dev = pci->dev; struct device_node *np = dev->of_node; struct platform_device *pdev = to_platform_device(dev); - struct resource_entry *win, *tmp; + struct resource_entry *win; struct pci_bus *child; struct pci_host_bridge *bridge; struct resource *cfg_res; @@ -342,31 +342,19 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!bridge) return -ENOMEM; - ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, - &bridge->windows, &pp->io_base); - if (ret) - return ret; - - ret = devm_request_pci_bus_resources(dev, &bridge->windows); + ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL); if (ret) return ret; /* Get the I/O and memory ranges from DT */ - resource_list_for_each_entry_safe(win, tmp, &bridge->windows) { + resource_list_for_each_entry(win, &bridge->windows) { switch (resource_type(win->res)) { case IORESOURCE_IO: - ret = devm_pci_remap_iospace(dev, win->res, - pp->io_base); - if (ret) { - dev_warn(dev, "Error %d: failed to map resource %pR\n", - ret, win->res); - resource_list_destroy_entry(win); - } else { - pp->io = win->res; - pp->io->name = "I/O"; - pp->io_size = resource_size(pp->io); - pp->io_bus_addr = pp->io->start - win->offset; - } + pp->io = win->res; + pp->io->name = "I/O"; + pp->io_size = resource_size(pp->io); + pp->io_bus_addr = pp->io->start - win->offset; + pp->io_base = pci_pio_to_address(pp->io->start); break; case IORESOURCE_MEM: pp->mem = win->res;
Convert the Designware host bridge to use the common pci_parse_request_of_pci_ranges(). Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andrew Murray <andrew.murray@arm.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rob Herring <robh@kernel.org> --- v2: - New patch .../pci/controller/dwc/pcie-designware-host.c | 28 ++++++------------- 1 file changed, 8 insertions(+), 20 deletions(-) -- 2.20.1