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[2.15.156.232]) by smtp.gmail.com with ESMTPSA id c140sm6027306wmd.18.2020.05.28.05.35.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 28 May 2020 05:35:13 -0700 (PDT) From: Bartosz Golaszewski To: John Crispin , Sean Wang , Mark Lee , "David S . Miller" , Jakub Kicinski , Matthias Brugger , Mark Brown Subject: [PATCH 2/2] net: ethernet: mtk-star-emac: use regmap bitops Date: Thu, 28 May 2020 14:34:59 +0200 Message-Id: <20200528123459.21168-3-brgl@bgdev.pl> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200528123459.21168-1-brgl@bgdev.pl> References: <20200528123459.21168-1-brgl@bgdev.pl> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200528_053517_449973_4F965C9D X-CRM114-Status: GOOD ( 11.72 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.128.65 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.128.65 listed in wl.mailspike.net] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 SPF_NONE SPF: sender does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephane Le Provost , Bartosz Golaszewski , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Fabien Parent , linux-mediatek@lists.infradead.org, Andrew Perepech , Pedro Tsai , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org From: Bartosz Golaszewski Shrink the code visually by replacing regmap_update_bits() with appropriate regmap bit operations where applicable. Signed-off-by: Bartosz Golaszewski --- drivers/net/ethernet/mediatek/mtk_star_emac.c | 80 ++++++++----------- 1 file changed, 35 insertions(+), 45 deletions(-) diff --git a/drivers/net/ethernet/mediatek/mtk_star_emac.c b/drivers/net/ethernet/mediatek/mtk_star_emac.c index 8596ca0e60eb..326ac792a4a0 100644 --- a/drivers/net/ethernet/mediatek/mtk_star_emac.c +++ b/drivers/net/ethernet/mediatek/mtk_star_emac.c @@ -413,8 +413,8 @@ static void mtk_star_dma_unmap_tx(struct mtk_star_priv *priv, static void mtk_star_nic_disable_pd(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_MAC_CFG, - MTK_STAR_BIT_MAC_CFG_NIC_PD, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG, + MTK_STAR_BIT_MAC_CFG_NIC_PD); } /* Unmask the three interrupts we care about, mask all others. */ @@ -434,41 +434,38 @@ static void mtk_star_intr_disable(struct mtk_star_priv *priv) static void mtk_star_intr_enable_tx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_BIT_INT_STS_TNTC, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_BIT_INT_STS_TNTC); } static void mtk_star_intr_enable_rx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_BIT_INT_STS_FNRC, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_BIT_INT_STS_FNRC); } static void mtk_star_intr_enable_stats(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_REG_INT_STS_MIB_CNT_TH, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_REG_INT_STS_MIB_CNT_TH); } static void mtk_star_intr_disable_tx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_BIT_INT_STS_TNTC, - MTK_STAR_BIT_INT_STS_TNTC); + regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_BIT_INT_STS_TNTC); } static void mtk_star_intr_disable_rx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_BIT_INT_STS_FNRC, - MTK_STAR_BIT_INT_STS_FNRC); + regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_BIT_INT_STS_FNRC); } static void mtk_star_intr_disable_stats(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_INT_MASK, - MTK_STAR_REG_INT_STS_MIB_CNT_TH, - MTK_STAR_REG_INT_STS_MIB_CNT_TH); + regmap_set_bits(priv->regs, MTK_STAR_REG_INT_MASK, + MTK_STAR_REG_INT_STS_MIB_CNT_TH); } static unsigned int mtk_star_intr_read(struct mtk_star_priv *priv) @@ -524,12 +521,10 @@ static void mtk_star_dma_init(struct mtk_star_priv *priv) static void mtk_star_dma_start(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL, - MTK_STAR_BIT_TX_DMA_CTRL_START, - MTK_STAR_BIT_TX_DMA_CTRL_START); - regmap_update_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL, - MTK_STAR_BIT_RX_DMA_CTRL_START, - MTK_STAR_BIT_RX_DMA_CTRL_START); + regmap_set_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL, + MTK_STAR_BIT_TX_DMA_CTRL_START); + regmap_set_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL, + MTK_STAR_BIT_RX_DMA_CTRL_START); } static void mtk_star_dma_stop(struct mtk_star_priv *priv) @@ -553,16 +548,14 @@ static void mtk_star_dma_disable(struct mtk_star_priv *priv) static void mtk_star_dma_resume_rx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL, - MTK_STAR_BIT_RX_DMA_CTRL_RESUME, - MTK_STAR_BIT_RX_DMA_CTRL_RESUME); + regmap_set_bits(priv->regs, MTK_STAR_REG_RX_DMA_CTRL, + MTK_STAR_BIT_RX_DMA_CTRL_RESUME); } static void mtk_star_dma_resume_tx(struct mtk_star_priv *priv) { - regmap_update_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL, - MTK_STAR_BIT_TX_DMA_CTRL_RESUME, - MTK_STAR_BIT_TX_DMA_CTRL_RESUME); + regmap_set_bits(priv->regs, MTK_STAR_REG_TX_DMA_CTRL, + MTK_STAR_BIT_TX_DMA_CTRL_RESUME); } static void mtk_star_set_mac_addr(struct net_device *ndev) @@ -845,8 +838,8 @@ static int mtk_star_hash_wait_ok(struct mtk_star_priv *priv) return ret; /* Check the BIST_OK bit. */ - regmap_read(priv->regs, MTK_STAR_REG_HASH_CTRL, &val); - if (!(val & MTK_STAR_BIT_HASH_CTRL_BIST_OK)) + if (!regmap_test_bits(priv->regs, MTK_STAR_REG_HASH_CTRL, + MTK_STAR_BIT_HASH_CTRL_BIST_OK)) return -EIO; return 0; @@ -880,12 +873,10 @@ static int mtk_star_reset_hash_table(struct mtk_star_priv *priv) if (ret) return ret; - regmap_update_bits(priv->regs, MTK_STAR_REG_HASH_CTRL, - MTK_STAR_BIT_HASH_CTRL_BIST_EN, - MTK_STAR_BIT_HASH_CTRL_BIST_EN); - regmap_update_bits(priv->regs, MTK_STAR_REG_TEST1, - MTK_STAR_BIT_TEST1_RST_HASH_MBIST, - MTK_STAR_BIT_TEST1_RST_HASH_MBIST); + regmap_set_bits(priv->regs, MTK_STAR_REG_HASH_CTRL, + MTK_STAR_BIT_HASH_CTRL_BIST_EN); + regmap_set_bits(priv->regs, MTK_STAR_REG_TEST1, + MTK_STAR_BIT_TEST1_RST_HASH_MBIST); return mtk_star_hash_wait_ok(priv); } @@ -1016,13 +1007,13 @@ static int mtk_star_enable(struct net_device *ndev) return ret; /* Setup the hashing algorithm */ - regmap_update_bits(priv->regs, MTK_STAR_REG_ARL_CFG, - MTK_STAR_BIT_ARL_CFG_HASH_ALG | - MTK_STAR_BIT_ARL_CFG_MISC_MODE, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_ARL_CFG, + MTK_STAR_BIT_ARL_CFG_HASH_ALG | + MTK_STAR_BIT_ARL_CFG_MISC_MODE); /* Don't strip VLAN tags */ - regmap_update_bits(priv->regs, MTK_STAR_REG_MAC_CFG, - MTK_STAR_BIT_MAC_CFG_VLAN_STRIP, 0); + regmap_clear_bits(priv->regs, MTK_STAR_REG_MAC_CFG, + MTK_STAR_BIT_MAC_CFG_VLAN_STRIP); /* Setup DMA */ mtk_star_dma_init(priv); @@ -1204,9 +1195,8 @@ static void mtk_star_set_rx_mode(struct net_device *ndev) int ret; if (ndev->flags & IFF_PROMISC) { - regmap_update_bits(priv->regs, MTK_STAR_REG_ARL_CFG, - MTK_STAR_BIT_ARL_CFG_MISC_MODE, - MTK_STAR_BIT_ARL_CFG_MISC_MODE); + regmap_set_bits(priv->regs, MTK_STAR_REG_ARL_CFG, + MTK_STAR_BIT_ARL_CFG_MISC_MODE); } else if (netdev_mc_count(ndev) > MTK_STAR_HASHTABLE_MC_LIMIT || ndev->flags & IFF_ALLMULTI) { for (i = 0; i < MTK_STAR_HASHTABLE_SIZE_MAX; i++) {