From patchwork Tue Jul 21 05:40:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanks Chen X-Patchwork-Id: 11674981 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A21F213B1 for ; Tue, 21 Jul 2020 05:41:11 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7AD5120792 for ; Tue, 21 Jul 2020 05:41:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Xes/tTS0"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="TSRbl2hx" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7AD5120792 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=phgFURukCJb2pvSqj15WnWrPkDpHnyg/OHIdgEHMNSk=; b=Xes/tTS01APdR3L3YwcvMq80k cXSl+VShW3x+VNaUnVk2T/hOa53NG1BqPdhG2lpF+eg4CUpJ4kXcXJHSAanOeU1RjYmMsLutm4EzT +fuPCPswSg+K9kYMKJwYw6L8n75Bc9MXsTkKB9PrtCucOHPL79fGAlRhwpbTliGclhcXpIqJivb4+ xa6Pu/UC+wxiDp2QEMcOs9Bl1bZGZTtcYmiPuzS1az30beQlRZcyGtLEk8MYONIVn1/hUY+/hDG4u I8jsGPy4XAIcyjK6faKTvPQ4jSuwLI/WhaIw6aw5dqhPf/A1QBrag/AonYHjM1qLgZypp2HNsOI8S IdZwnHNkg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jxl1Q-0004bg-L8; Tue, 21 Jul 2020 05:41:00 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jxl1N-0004aH-Jy; Tue, 21 Jul 2020 05:40:59 +0000 X-UUID: cbff1c83567247b7a6bb6056d890075a-20200720 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=eWGLaIff1b5fkIGfcrTBbKrRw56MLBclARuf7ORFwYI=; b=TSRbl2hxl9TchwnuA4LaHCjKDdlTPI1icBpkoGXq114J7G9G7zI6ajJM+SckXX8o0SOI4SebOU1DG21/4tr3csbx34W5bvgFrIhNJ+8QpPsWyvt0cdTRGscSfcSBsrN+4SIbPgxIFs1tR5ENGPx/62dZ0NpYNRgd8NnqZ5QlGT0=; X-UUID: cbff1c83567247b7a6bb6056d890075a-20200720 Received: from mtkcas68.mediatek.inc [(172.29.94.19)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLS) with ESMTP id 1160659177; Mon, 20 Jul 2020 21:40:46 -0800 Received: from MTKMBS01N1.mediatek.inc (172.21.101.68) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 20 Jul 2020 22:40:48 -0700 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs01n1.mediatek.inc (172.21.101.68) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 21 Jul 2020 13:40:35 +0800 Received: from mtkslt209.mediatek.inc (10.21.15.96) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 21 Jul 2020 13:40:35 +0800 From: Hanks Chen To: Michael Turquette , Stephen Boyd , Matthias Brugger , Rob Herring Subject: [PATCH 1/2] dt-bindings: clock: remove UART3 clock support Date: Tue, 21 Jul 2020 13:40:32 +0800 Message-ID: <20200721054033.18520-2-hanks.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20200721054033.18520-1-hanks.chen@mediatek.com> References: <20200721054033.18520-1-hanks.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_014057_824668_6696C5CE X-CRM114-Status: GOOD ( 10.93 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 MIME_BASE64_TEXT RAW: Message text disguised using base64 encoding -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: CC Hwang , wsd_upstream@mediatek.com, Hanks Chen , YueHaibing , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-mediatek@lists.infradead.org, mtk01761 , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org remove the redundant clk interface of uart. Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") Signed-off-by: Hanks Chen --- include/dt-bindings/clock/mt6779-clk.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/dt-bindings/clock/mt6779-clk.h b/include/dt-bindings/clock/mt6779-clk.h index b083139afbd2..2b5f2354d7eb 100644 --- a/include/dt-bindings/clock/mt6779-clk.h +++ b/include/dt-bindings/clock/mt6779-clk.h @@ -229,7 +229,6 @@ #define CLK_INFRA_UART0 21 #define CLK_INFRA_UART1 22 #define CLK_INFRA_UART2 23 -#define CLK_INFRA_UART3 24 #define CLK_INFRA_GCE_26M 25 #define CLK_INFRA_CQ_DMA_FPC 26 #define CLK_INFRA_BTIF 27