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Tue, 21 Jul 2020 19:25:45 -0700 (PDT) Received: from xps15.herring.priv ([64.188.179.252]) by smtp.googlemail.com with ESMTPSA id y2sm11687981iox.22.2020.07.21.19.25.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jul 2020 19:25:44 -0700 (PDT) From: Rob Herring To: Bjorn Helgaas , Lorenzo Pieralisi Subject: [PATCH 08/19] PCI: xilinx: Use pci_is_root_bus() to check if bus is root bus Date: Tue, 21 Jul 2020 20:25:03 -0600 Message-Id: <20200722022514.1283916-9-robh@kernel.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200722022514.1283916-1-robh@kernel.org> References: <20200722022514.1283916-1-robh@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200721_222545_919690_9BB823D9 X-CRM114-Status: GOOD ( 16.35 ) X-Spam-Score: 0.3 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (0.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.166.68 listed in list.dnswl.org] -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.166.68 listed in wl.mailspike.net] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit [robherring2[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [robherring2[at]gmail.com] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Karthikeyan Mitran , linux-pci@vger.kernel.org, Shawn Lin , Thierry Reding , Thomas Petazzoni , Fabio Estevam , Marek Vasut , Linus Walleij , Ryder Lee , Will Deacon , Michal Simek , Jonathan Hunter , linux-rockchip@lists.infradead.org, Murali Karicheri , NXP Linux Team , Hou Zhiqiang , Richard Zhu , Sascha Hauer , linux-mediatek@lists.infradead.org, linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Gustavo Pimentel , Yoshihiro Shimoda , linux-renesas-soc@vger.kernel.org, Tom Joseph , Pengutronix Kernel Team , Jingoo Han , Shawn Guo , Lucas Stach Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org Use pci_is_root_bus() rather than tracking the root bus number to determine if the bus is the root bus or not. This removes storing duplicated data as well as the need for the host bridge driver to have to care about the bus numbers in most cases. There was also a bug that the root_busno is never set which means the root bus number is always 0 even if the DT said something else. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Michal Simek Cc: linux-pci@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring --- drivers/pci/controller/pcie-xilinx.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/pcie-xilinx.c b/drivers/pci/controller/pcie-xilinx.c index cce67cb8fb2b..7bf80f68efa9 100644 --- a/drivers/pci/controller/pcie-xilinx.c +++ b/drivers/pci/controller/pcie-xilinx.c @@ -98,7 +98,6 @@ * @reg_base: IO Mapped Register Base * @irq: Interrupt number * @msi_pages: MSI pages - * @root_busno: Root Bus number * @dev: Device pointer * @msi_domain: MSI IRQ domain pointer * @leg_domain: Legacy IRQ domain pointer @@ -108,7 +107,6 @@ struct xilinx_pcie_port { void __iomem *reg_base; u32 irq; unsigned long msi_pages; - u8 root_busno; struct device *dev; struct irq_domain *msi_domain; struct irq_domain *leg_domain; @@ -162,14 +160,13 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) struct xilinx_pcie_port *port = bus->sysdata; /* Check if link is up when trying to access downstream ports */ - if (bus->number != port->root_busno) + if (!pci_is_root_bus(bus)) { if (!xilinx_pcie_link_up(port)) return false; - - /* Only one device down on each root port */ - if (bus->number == port->root_busno && devfn > 0) + } else if (devfn > 0) { + /* Only one device down on each root port */ return false; - + } return true; }