From patchwork Mon Oct 26 17:55:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Enric Balletbo i Serra X-Patchwork-Id: 11858049 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D7DDD1130 for ; Mon, 26 Oct 2020 18:00:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3124F222C8 for ; Mon, 26 Oct 2020 18:00:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="DvibrbeM" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3124F222C8 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=collabora.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=d9NKUiptJqLj+zVOkhfEcn2HpsvcCxsQFh4s5fPNWa0=; b=DvibrbeM6+NOSVHtTvkER4Rbb v8Mz54yc9Gnkw0JUwEfryYmuvS8n8bM2+4SMBWZqj0ClL1gnuAJIAOSLatki5+A2XcNac6rI7J+EL MR0IWX/B8JRAz/bmyzIivfD83/TOimLtNUzVAyLavqev0bxaVZTz+7RVTG28SNY1mQQHyERX7sMs3 r6moij7eZcxjyBicrDDC9Mzx8S0b+guyEJfo9X/CH/NmY/D8Um22ksNvgL23+D4O1qOfjfys7/SOA GaSd/D8booAYtnahc3AQWiitZwTr8dkRZcBZLZiK6q5VUic6Oq3iiF5Wpyq8u6cHhJk8NmVMT96l1 AcvYKbOFA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX6mt-0001Wg-02; Mon, 26 Oct 2020 18:00:07 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX6ia-0007uz-1u; Mon, 26 Oct 2020 17:55:50 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 695311F44FC8 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Subject: [PATCH v3 06/16] soc: mediatek: pm-domains: Add SMI block as bus protection block Date: Mon, 26 Oct 2020 18:55:15 +0100 Message-Id: <20201026175526.2915399-7-enric.balletbo@collabora.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201026175526.2915399-1-enric.balletbo@collabora.com> References: <20201026175526.2915399-1-enric.balletbo@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201026_135540_369176_97C3AD11 X-CRM114-Status: GOOD ( 18.40 ) X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drinkcat@chromium.org, weiyi.lu@mediatek.com, fparent@baylibre.com, Matthias Brugger , linux-mediatek@lists.infradead.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Collabora Kernel ML , linux-arm-kernel@lists.infradead.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+patchwork-linux-mediatek=patchwork.kernel.org@lists.infradead.org From: Matthias Brugger Apart from the infracfg block, the SMI block is used to enable the bus protection for some power domains. Add support for this block. Signed-off-by: Matthias Brugger Signed-off-by: Enric Balletbo i Serra --- Changes in v3: - Do not reuse bpd for 2 different things. - Disable pd->smi first and after that pd->infracfg. - Rename BUT_PROT_UPDATE_MT8173 to BUS_PROT_UPDATE_TOPAXI as in all the other SoCs TOPAXI is mapped to the same address. Changes in v2: None drivers/soc/mediatek/mt8173-pm-domains.h | 18 ++++++-------- drivers/soc/mediatek/mtk-pm-domains.c | 31 +++++++++++++++--------- drivers/soc/mediatek/mtk-pm-domains.h | 25 +++++++++++++++++++ 3 files changed, 53 insertions(+), 21 deletions(-) diff --git a/drivers/soc/mediatek/mt8173-pm-domains.h b/drivers/soc/mediatek/mt8173-pm-domains.h index 341cc287c8ce..cddd2c3ef8e9 100644 --- a/drivers/soc/mediatek/mt8173-pm-domains.h +++ b/drivers/soc/mediatek/mt8173-pm-domains.h @@ -34,10 +34,9 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = { .ctl_offs = SPM_DIS_PWR_CON, .sram_pdn_bits = GENMASK(11, 8), .sram_pdn_ack_bits = GENMASK(12, 12), - .bp_infracfg[0] = { - .bus_prot_reg_update = true, - .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MM_M0 | - MT8173_TOP_AXI_PROT_EN_MM_M1, + .bp_infracfg = { + BUS_PROT_UPDATE_TOPAXI(MT8173_TOP_AXI_PROT_EN_MM_M0 | + MT8173_TOP_AXI_PROT_EN_MM_M1), }, }, [MT8173_POWER_DOMAIN_VENC_LT] = { @@ -76,12 +75,11 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = { .ctl_offs = SPM_MFG_PWR_CON, .sram_pdn_bits = GENMASK(13, 8), .sram_pdn_ack_bits = GENMASK(21, 16), - .bp_infracfg[0] = { - .bus_prot_reg_update = true, - .bus_prot_mask = MT8173_TOP_AXI_PROT_EN_MFG_S | - MT8173_TOP_AXI_PROT_EN_MFG_M0 | - MT8173_TOP_AXI_PROT_EN_MFG_M1 | - MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT, + .bp_infracfg = { + BUS_PROT_UPDATE_TOPAXI(MT8173_TOP_AXI_PROT_EN_MFG_S | + MT8173_TOP_AXI_PROT_EN_MFG_M0 | + MT8173_TOP_AXI_PROT_EN_MFG_M1 | + MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT), }, }, }; diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 92c61e59255b..006eb7571d32 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -32,6 +32,7 @@ struct scpsys_domain { int num_clks; struct clk_bulk_data *clks; struct regmap *infracfg; + struct regmap *smi; }; struct scpsys { @@ -100,9 +101,9 @@ static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, st if (bpd[i].bus_prot_reg_update) regmap_update_bits(regmap, INFRA_TOPAXI_PROTECTEN, mask, mask); else - regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_SET, mask); + regmap_write(regmap, bpd[i].bus_prot_set, mask); - ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1, + ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta, val, (val & mask) == mask, MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); if (ret) @@ -114,11 +115,13 @@ static int _scpsys_bus_protect_enable(const struct scpsys_bus_prot_data *bpd, st static int scpsys_bus_protect_enable(struct scpsys_domain *pd) { - const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg; int ret; - ret = _scpsys_bus_protect_enable(bpd, pd->infracfg); - return ret; + ret = _scpsys_bus_protect_enable(pd->data->bp_infracfg, pd->infracfg); + if (ret) + return ret; + + return _scpsys_bus_protect_enable(pd->data->bp_smi, pd->smi); } static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd, @@ -133,11 +136,11 @@ static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd, return 0; if (bpd[i].bus_prot_reg_update) - regmap_update_bits(regmap, INFRA_TOPAXI_PROTECTEN, mask, 0); + regmap_update_bits(regmap, bpd[i].bus_prot_set, mask, 0); else - regmap_write(regmap, INFRA_TOPAXI_PROTECTEN_CLR, mask); + regmap_write(regmap, bpd[i].bus_prot_clr, mask); - ret = regmap_read_poll_timeout(regmap, INFRA_TOPAXI_PROTECTSTA1, + ret = regmap_read_poll_timeout(regmap, bpd[i].bus_prot_sta, val, !(val & mask), MTK_POLL_DELAY_US, MTK_POLL_TIMEOUT); if (ret) @@ -149,11 +152,13 @@ static int _scpsys_bus_protect_disable(const struct scpsys_bus_prot_data *bpd, static int scpsys_bus_protect_disable(struct scpsys_domain *pd) { - const struct scpsys_bus_prot_data *bpd = pd->data->bp_infracfg; int ret; - ret = _scpsys_bus_protect_disable(bpd, pd->infracfg); - return ret; + ret = _scpsys_bus_protect_disable(pd->data->bp_smi, pd->smi); + if (ret) + return ret; + + return _scpsys_bus_protect_disable(pd->data->bp_infracfg, pd->infracfg); } static int scpsys_power_on(struct generic_pm_domain *genpd) @@ -266,6 +271,10 @@ generic_pm_domain *scpsys_add_one_domain(struct scpsys *scpsys, struct device_no if (IS_ERR(pd->infracfg)) pd->infracfg = NULL; + pd->smi = syscon_regmap_lookup_by_phandle(node, "mediatek,smi"); + if (IS_ERR(pd->smi)) + pd->smi = NULL; + pd->num_clks = of_clk_get_parent_count(node); if (pd->num_clks > 0) { pd->clks = devm_kcalloc(scpsys->dev, pd->num_clks, sizeof(*pd->clks), GFP_KERNEL); diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h index e428fe23a7e3..7b1abcfc4ba3 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.h +++ b/drivers/soc/mediatek/mtk-pm-domains.h @@ -34,8 +34,31 @@ #define SPM_MAX_BUS_PROT_DATA 3 +#define _BUS_PROT(_mask, _set, _clr, _sta, _update) { \ + .bus_prot_mask = (_mask), \ + .bus_prot_set = _set, \ + .bus_prot_clr = _clr, \ + .bus_prot_sta = _sta, \ + .bus_prot_reg_update = _update, \ + } + +#define BUS_PROT_WR(_mask, _set, _clr, _sta) \ + _BUS_PROT(_mask, _set, _clr, _sta, false) + +#define BUS_PROT_UPDATE(_mask, _set, _clr, _sta) \ + _BUS_PROT(_mask, _set, _clr, _sta, true) + +#define BUS_PROT_UPDATE_TOPAXI(_mask) \ + BUS_PROT_UPDATE(_mask, \ + INFRA_TOPAXI_PROTECTEN, \ + INFRA_TOPAXI_PROTECTEN_CLR, \ + INFRA_TOPAXI_PROTECTSTA1) + struct scpsys_bus_prot_data { u32 bus_prot_mask; + u32 bus_prot_set; + u32 bus_prot_clr; + u32 bus_prot_sta; bool bus_prot_reg_update; }; @@ -47,6 +70,7 @@ struct scpsys_bus_prot_data { * @sram_pdn_ack_bits: The mask for sram power control acked bits. * @caps: The flag for active wake-up action. * @bp_infracfg: bus protection for infracfg subsystem + * @bp_smi: bus protection for smi subsystem */ struct scpsys_domain_data { u32 sta_mask; @@ -55,6 +79,7 @@ struct scpsys_domain_data { u32 sram_pdn_ack_bits; u8 caps; const struct scpsys_bus_prot_data bp_infracfg[SPM_MAX_BUS_PROT_DATA]; + const struct scpsys_bus_prot_data bp_smi[SPM_MAX_BUS_PROT_DATA]; }; struct scpsys_soc_data {