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Wed, 09 Dec 2020 03:44:50 -0800 (PST) From: Fabien Parent To: Rob Herring , Matthias Brugger Subject: [PATCH v2 2/2] =?utf-8?q?=F0=9F=93=A4_arm64=3A_dts=3A_mediatek=3A_m?= =?utf-8?q?t8516=3A_add_support_for_APDMA?= Date: Wed, 9 Dec 2020 12:44:40 +0100 Message-Id: <20201209114440.62950-2-fparent@baylibre.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201209114440.62950-1-fparent@baylibre.com> References: <20201209114440.62950-1-fparent@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201209_064453_064646_FA6EA68D X-CRM114-Status: GOOD ( 11.24 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fabien Parent , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add support the APDMA IP on MT8516. APDMA is a DMA controller for UARTs. Signed-off-by: Fabien Parent --- V2: Add missing dma-names properties on uart nodes arch/arm64/boot/dts/mediatek/mt8516.dtsi | 30 ++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8516.dtsi b/arch/arm64/boot/dts/mediatek/mt8516.dtsi index e6e4d9d60094..b80e95574bef 100644 --- a/arch/arm64/boot/dts/mediatek/mt8516.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8516.dtsi @@ -276,6 +276,27 @@ gic: interrupt-controller@10310000 { (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + apdma: dma-controller@11000480 { + compatible = "mediatek,mt8516-uart-dma", + "mediatek,mt6577-uart-dma"; + reg = <0 0x11000480 0 0x80>, + <0 0x11000500 0 0x80>, + <0 0x11000580 0 0x80>, + <0 0x11000600 0 0x80>, + <0 0x11000980 0 0x80>, + <0 0x11000a00 0 0x80>; + interrupts = , + , + , + , + , + ; + dma-requests = <6>; + clocks = <&topckgen CLK_TOP_APDMA>; + clock-names = "apdma"; + #dma-cells = <1>; + }; + uart0: serial@11005000 { compatible = "mediatek,mt8516-uart", "mediatek,mt6577-uart"; @@ -284,6 +305,9 @@ uart0: serial@11005000 { clocks = <&topckgen CLK_TOP_UART0_SEL>, <&topckgen CLK_TOP_UART0>; clock-names = "baud", "bus"; + dmas = <&apdma 0 + &apdma 1>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -295,6 +319,9 @@ uart1: serial@11006000 { clocks = <&topckgen CLK_TOP_UART1_SEL>, <&topckgen CLK_TOP_UART1>; clock-names = "baud", "bus"; + dmas = <&apdma 2 + &apdma 3>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -306,6 +333,9 @@ uart2: serial@11007000 { clocks = <&topckgen CLK_TOP_UART2_SEL>, <&topckgen CLK_TOP_UART2>; clock-names = "baud", "bus"; + dmas = <&apdma 4 + &apdma 5>; + dma-names = "tx", "rx"; status = "disabled"; };